PIC16C622A-20I/P Microchip Technology, PIC16C622A-20I/P Datasheet - Page 43

• Manufacturer Part Number: PIC16C622A-20I/P
• Description: IC,MICROCONTROLLER,8-BIT,PIC CPU,CMOS,DIP,18PIN,PLASTIC
• Manufacturer: Microchip Technology
• Series: PIC® 16Cr

Specifications of PIC16C622A-20I/P

• Rohs Compliant: YES
• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 20MHz
• Peripherals: Brown-out Detect/Reset, POR, WDT
• Number Of I /o: 13
• Program Memory Size: 3.5KB (2K x 14)
• Program Memory Type: OTP
• Ram Size: 128 x 8
• Voltage - Supply (vcc/vdd): 2.5 V ~ 5.5 V
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 18-DIP (0.300", 7.62mm)
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: ISPICR1 - ADAPTER IN-CIRCUIT PROGRAMMINGDVA16XP180 - ADAPTER DEVICE FOR MPLAB-ICEAC164010 - MODULE SKT PROMATEII DIP/SOIC
• Eeprom Size: -
• Data Converters: -
• Connectivity: -
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

7.6
The comparator interrupt flag is set whenever there is
a change in the output value of either comparator.
Software will need to maintain information about the
status of the output bits, as read from CMCON<7:6>, to
determine the actual change that has occurred. The
CMIF bit, PIR1<6>, is the comparator interrupt flag.
The CMIF bit must be RESET by clearing ‘0’. Since it is
also possible to write a '1' to this register, a simulated
interrupt may be initiated.
The
(INTCON<6>) must be set to enable the interrupt. In
addition, the GIE bit must also be set. If any of these
bits are clear, the interrupt is not enabled, though the
CMIF bit will still be set if an interrupt condition occurs.
The user, in the interrupt service routine, can clear the
interrupt in the following manner:
a)
b)
A mismatch condition will continue to set flag bit CMIF.
Reading CMCON will end the mismatch condition and
allow flag bit CMIF to be cleared.
7.7
When a comparator is active and the device is placed
in SLEEP mode, the comparator remains active and
the interrupt is functional if enabled. This interrupt will
FIGURE 7-4:
 2003 Microchip Technology Inc.
Note:
Any read or write of CMCON. This will end the
mismatch condition.
Clear flag bit CMIF.
CMIE
Comparator Interrupts
Comparator Operation During
SLEEP
If a change in the CMCON register
(C1OUT or C2OUT) should occur when a
read operation is being executed (start of
the Q2 cycle), then the CMIF (PIR1<6>)
interrupt flag may not get set.
bit
VA
Legend
R
S
(PIE1<6>)
< 10K
ANALOG INPUT MODEL
C
V
I
R
R
VA
A
LEAKAGE
T
PIN
IC
S
IN
and
C
5 pF
PIN
the
=
=
=
=
=
=
PEIE
Input Capacitance
Threshold Voltage
Leakage Current at the pin due to various junctions
Interconnect Resistance
Source Impedance
Analog Voltage
bit
V
DD
V
V
T
T
= 0.6V
= 0.6V
wake up the device from SLEEP mode when enabled.
While the comparator is powered-up, higher SLEEP
currents than shown in the power-down current
specification will occur. Each comparator that is
operational will consume additional current as shown in
the comparator specifications. To minimize power
consumption while in SLEEP mode, turn off the
comparators, CM<2:0> = 111, before entering SLEEP.
If the device wakes up from SLEEP, the contents of the
CMCON register are not affected.
7.8
A device RESET forces the CMCON register to its
RESET state. This forces the comparator module to be
in the comparator RESET mode, CM<2:0> = 000. This
ensures that all potential inputs are analog inputs.
Device current is minimized when analog inputs are
present at RESET time. The comparators will be
powered-down during the RESET interval.
7.9
A simplified circuit for an analog input is shown in
Figure 7-4. Since the analog pins are connected to a
digital output, they have reverse biased diodes to V
and V
V
range by more than 0.6V in either direction, one of the
diodes is forward biased and a latchup may occur. A
maximum
recommended for the analog sources. Any external
component connected to an analog input pin, such as
a capacitor or a Zener diode, should have very little
leakage current.
SS
and V
SS
. The analog input therefore, must be between
Effects of a RESET
Analog Input Connection
Considerations
I
±500 nA
V
LEAKAGE
DD
SS
source
. If the input voltage deviates from this
R
IC
impedance
PIC16C62X
DS30235J-page 41
of
10 kΩ
DD
is