LM3524DN National Semiconductor, LM3524DN Datasheet - Page 8

• Manufacturer Part Number: LM3524DN
• Description: ENHANCED PWM CONTROLLER, 3524, DIP
• Manufacturer: National Semiconductor

Specifications of LM3524DN

• Frequency: 350kHz
• Power Dissipation Pd: 1W
• Digital Ic Case Style: DIP
• No. Of Pins: 16
• Operating Temperature Range: 0°C To +125°C
• Svhc: No SVHC (15-Dec-2010)
• Operating Temperature Max: 125°C
• Base Number: 3524
• Controller Type: PWM
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

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Functional Description
INTERNAL VOLTAGE REGULATOR
The LM3524D has an on-chip 5V, 50 mA, short circuit pro-
tected voltage regulator. This voltage regulator provides a
supply for all internal circuitry of the device and can be used
as an external reference.
For input voltages of less than 8V the 5V output should be
shorted to pin 15, V
these pins shorted the input voltage must be limited to a
maximum of 6V. If input voltages of 6V–8V are to be used, a
pre-regulator, as shown in Figure 1, must be added.
*Minimum C
OSCILLATOR
The LM3524D provides a stable on-board oscillator. Its fre-
quency is set by an external resistor, R
graph of R
The oscillator’s output provides the signals for triggering an
internal flip-flop, which directs the PWM information to the
outputs, and a blanking pulse to turn off both outputs during
transitions to ensure that cross conduction does not occur.
The width of the blanking pulse, or dead time, is controlled
by the value of C
values of R
0.1 µF.
If two or more LM3524D’s must be synchronized together,
the easiest method is to interconnect all pin 3 terminals, tie
all pin 7’s (together) to a single C
except one which is connected to a single R
works well unless the LM3524D’s are more than 6" apart.
A second synchronization method is appropriate for any
circuit layout. One LM3524D, designated as master, must
have its R
LM3524D(s) should each have an R
period. All pin 3’s must then be interconnected to allow the
master to properly reset the slave units.
The oscillator may be synchronized to an external clock
source by setting the internal free-running oscillator fre-
quency 10% slower than the external clock and driving pin 3
with a pulse train (approx. 3V) from the clock. Pulse width
should be greater than 50 ns to insure full synchronization.
O
T
T
of 10 µF required for stability.
, C
T
C
are 1.8 kΩ to 100 kΩ, and for C
T
T
set for the correct period. The other slave
vs oscillator frequency is shown is Figure 2.
T
, as shown in Figure 3. The recommended
IN
, which disables the 5V regulator. With
FIGURE 1.
T
, and leave all pin 6’s open
T
C
T
T
and capacitor, C
set for a 10% longer
T
T
. This method
, 0.001 µF to
00865010
T
. A
8
ERROR AMPLIFIER
The error amplifier is a differential input, transconductance
amplifier. Its gain, nominally 86 dB, is set by either feedback
or output loading. This output loading can be done with
either purely resistive or a combination of resistive and re-
active components. A graph of the amplifier’s gain vs output
load resistance is shown in Figure 4.
FIGURE 2.
FIGURE 3.
FIGURE 4.
00865005
00865006
00865007