SST39VF1681-70-4I-EKE SILICON STORAGE TECHNOLOGY, SST39VF1681-70-4I-EKE Datasheet - Page 11

• Manufacturer Part Number: SST39VF1681-70-4I-EKE
• Description: MEMORY, FLASH, 16MBIT, B/B, 48TSOP
• Manufacturer: SILICON STORAGE TECHNOLOGY

Specifications of SST39VF1681-70-4I-EKE

• Memory Size: 16Mbit
• Supply Voltage Range: 2.7V To 3.6V
• Memory Case Style: TSOP
• No. Of Pins: 48
• Operating Temperature Range: -40°C To +85��C
• Svhc: No SVHC (18-Jun-2010)
• Access Time: 70ns
• Interface: X8
• Memory Type: Flash - NOR
• Memory Configuration: 2M X 8
• Interface Type: CFI
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

16 Mbit Multi-Purpose Flash Plus
SST39VF1681 / SST39VF1682
TABLE 10: DC O
TABLE 11: R
TABLE 12: C
TABLE 13: R
©2003 Silicon Storage Technology, Inc.
Symbol
I
I
I
I
I
I
V
V
V
V
V
V
Symbol
T
T
Parameter
C
C
Symbol
N
T
I
DD
SB
ALP
LI
LIW
LO
LTH
PU-READ
PU-WRITE
DR
IL
ILC
IH
IHC
OL
OH
I/O
IN
END
1. Typical conditions for the Active Current shown on the front page of the data sheet are average values at 25°C
2. See Figure 17
3. The I
1. This parameter is measured only for initial qualification and after a design or process change that could affect this parameter.
1. This parameter is measured only for initial qualification and after a design or process change that could affect this parameter.
1. This parameter is measured only for initial qualification and after a design or process change that could affect this parameter.
2. N
1
1
1
1
(room temperature), and V
higher minimum specification.
1,2
END
1
DD
1
endurance rating is qualified as a 10,000 cycle minimum for the whole device. A sector- or block-level rating would result in a
Parameter
Power Supply Current
Read
Program and Erase
Standby V
Auto Low Power
Input Leakage Current
Input Leakage Current
on WP# pin and RST#
Output Leakage Current
Input Low Voltage
Input Low Voltage (CMOS)
Input High Voltage
Input High Voltage (CMOS)
Output Low Voltage
Output High Voltage
current listed is typically less than 2mA/MHz, with OE# at V
ECOMMENDED
APACITANCE (Ta = 25°C, f=1 Mhz, other pins open)
ELIABILITY
3
Parameter
Power-up to Read Operation
Power-up to Program/Erase Operation
Description
I/O Pin Capacitance
Input Capacitance
Parameter
Endurance
Data Retention
Latch Up
PERATING
DD
Current
C
HARACTERISTICS
DD
C
S
= 3V. Not 100% tested.
YSTEM
HARACTERISTICS
P
OWER
V
V
0.7V
-
DD
DD
UP
Min
-0.3
-0.2
V
DD
T
DD
IMINGS
Minimum Specification
= 2.7-3.6V
Limits
11
100 + I
Max
0.8
0.3
0.2
10,000
18
35
20
20
10
10
1
100
IH.
Typical V
1
DD
Units
mA
mA
µA
µA
µA
µA
µA
DD
V
V
V
V
V
V
is 3V.
Test Conditions
Address input=V
V
CE#=V
CE#=WE#=V
CE#=V
CE#=V
All inputs=V
V
WP#=GND to V
V
V
V
V
V
I
I
OL
OH
Cycles
DD
IN
OUT
DD
DD
DD
DD
Test Condition
Units
Years
=100 µA, V
=GND to V
=-100 µA, V
mA
=V
=V
=V
=V
=V
Minimum
=GND to V
V
V
I/O
DD
DD
DD
DD
DD
IN
IL
IHC
ILC
100
100
, OE#=WE#=V
= 0V
= 0V
Max
, V
Min
Max
Max
Max
, V
SS
DD
Preliminary Specifications
DD
IL
DD
DD
JEDEC Standard A117
JEDEC Standard A103
, OE#=V
or V
=V
DD
=V
DD
DD
JEDEC Standard 78
, V
=V
ILT
=V
DD
DD
, V
/V
DD,
or RST#=GND to V
DD
DD
Test Method
DD
Max
DD
IHT
Max
=V
WE#=V
Min
S71243-03-000
IH
IH
=V
Min
2
DD
, at f=5 MHz,
, all I/Os open
Maximum
DD
Max
12 pF
Units
6 pF
Max
µs
µs
IHC
T10.8 1243
T11.0 1243
T12.0 1243
T13.2 1243
11/03
DD