DP83910AV National Semiconductor, DP83910AV Datasheet

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DP83910AV

Manufacturer Part Number
DP83910AV
Description
CMOS SERIAL NETWORK INTERFACE
Manufacturer
National Semiconductor
Datasheet

Specifications of DP83910AV

Rohs Compliant
NO

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C 1995 National Semiconductor Corporation
DP83910A CMOS SNI
Serial Network Interface
General Description
The DP83910A CMOS Serial Network Interface (SNI) is a
direct-pin equivalent of the bipolar DP8391 SNI and pro-
vides the Manchester data encoding and decoding func-
tions for IEEE 802 3 Ethernet Thin-Ethernet type local area
networks The SNI interfaces the DP8390 Network Interface
Controller (NIC) to the DP8392 CTI or an Ethernet transceiv-
er cable When transmitting the SNI converts non-return-to-
zero (NRZ) data from the controller into Manchester data
and sends the converted data differentially to the transceiv-
er Conversely when receiving a Phase Lock Loop de-
codes the 10 Mbit s data from the transceiver into NRZ
data for the controller
The DP83910A operates in conjunction with the DP8392
Coaxial Transceiver Interface (CTI) and the DP8390 Net-
work Interface Controller (NIC) to form a three-chip set that
implements a complete IEEE 802 3 compatible network as
shown below The DP83910A is a functionally complete
Manchester encoder decoder including a balanced driver
and receiver on-board crystal oscillator collision signal
translator
1 0 System Diagram
TRI-STATE is a registered trademark of National Semiconductor Corporation
and a diagnostic loopback feature
TL F 9365
IEEE 802 3 Compatible Ethernet Thin-Ethernet 10 BaseT
Local Area Network Chip Set
The
DP83910A fabricated CMOS typically consumes less than
70 mA of current However as a result of being CMOS the
DP83910A’s differential signals must be isolated in both
Ethernet and thin wire Ethernet
Features
Y
Y
Y
Y
Y
Y
Y
Y
Y
Compatible with Ethernet I IEEE 802 3 10BASE5
10BASE2 and 10BASE-T
Designed to interface with 10BASE-T transceivers
Functional and pin-out duplicate of the DP8391
10 Mbits s Manchester encoding decoding with receive
clock recovery
Requires no precision components
Loopback capability for diagnostics
Externally selectable half or full step modes of opera-
tion at transmit output
Squelch circuitry at the receive and collision inputs to
reject noise
TTL MOS compatible controller interface
RRD-B30M105 Printed in U S A
TL F 9365 – 1
May 1995

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DP83910AV Summary of contents

Page 1

... System Diagram IEEE 802 3 Compatible Ethernet Thin-Ethernet 10 BaseT TRI-STATE is a registered trademark of National Semiconductor Corporation C 1995 National Semiconductor Corporation TL F 9365 DP83910A fabricated CMOS typically consumes less than current However as a result of being CMOS the DP83910A’ ...

Page 2

Block Diagram 3 0 Functional Description The DP83910A consists of five main logical blocks a) The oscillator generates the 10 MHz transmit clock signal for system timing b) The Manchester encoder accepts NRZ data from the controller encodes ...

Page 3

... FIGURE 2 DP83910A Connection for Oscillator Module 4 0 Connection Diagrams Top View Order Number DP83910AV See NS Package Number V28A (Continued MANCHESTER DECODER The decoder consists of a differential receiver and a PLL to separate Manchester encoded data stream into clock sig- ...

Page 4

Typical Application 4 ...

Page 5

Pin Descriptions 24-Pin DIP 28-Pin PCC Name 1 1 COL 2 2 RXD 3 3 CRS 4 4 RXC 5 5 SEL LBK ...

Page 6

... Absolute Maximum Ratings If Military Aerospace specified devices are required please contact the National Semiconductor Sales Office Distributors for availability and specifications Supply Voltage ( Input Voltage ( Output Voltage ( OUT Differential Input Voltage Differential Output Voltage Power Dissipation Storage Temperature Specifications Symbol ...

Page 7

Switching Characteristics Oscillator Specification Symbol Parameter Transmit Clock High XTH Transmit Clock Low XTL Transmit Specifications (Start of Packet) Symbol Parameter t Transmit Clock High Time (Note 1) TCh t Transmit Clock ...

Page 8

Switching Characteristics Transmit Specifications (End of Packet) Symbol Parameter t Transmit Enable Hold Time from Rising Edge of TXC TXEh t Transmit Output High before Idle (Half Step) TOh t Transmit Output Idle Time (Half Step) TOi Receiver ...

Page 9

Switching Characteristics Receiver Specifications (End of Packet) Symbol Parameter t Carrier Sense Turn Off Delay (Note 1) CRSoff t Minimum Number of RXCs after CRS Low (Note 2) RXCh Note 1 When CRS goes low it will go ...

Page 10

Switching Characteristics Loopback Specifications Symbol Parameter t Loopback Setup Time (Note 1) LBs t Loopback Hold Time (Note 1) LBh Note 1 This parameter is guaranteed by design and is not tested AC Timing Test Conditions All specifications ...

Page 11

Physical Dimensions inches (millimeters) Molded Dual-In-Line Package (N) Order Number DP83910AN NS Package Number N24C 11 ...

Page 12

... National does not assume any responsibility for use of any circuitry described no circuit patent licenses are implied and National reserves the right at any time without notice to change said circuitry and specifications Plastic Chip Carrier (V) Order Number DP83910AV NS Package Number V28A 2 A critical component is any component of a life ...

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