DS90LV047ATM National Semiconductor, DS90LV047ATM Datasheet - Page 3

• Manufacturer Part Number: DS90LV047ATM
• Description: Driver IC
• Manufacturer: National Semiconductor

Specifications of DS90LV047ATM

• Driver Case Style: SOIC
• No. Of Pins: 16
• No. Of Driver/receivers: 4
• Peak Reflow Compatible (260 C): No
• Output Current: -9mA
• Program Memory Type: Microstepping DMOS Driver/Translator
• Leaded Process Compatible: No
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

t
t
t
t
t
t
t
t
t
t
t
t
f
PHLD
PLHD
SKD1
SKD2
SKD3
SKD4
TLH
THL
PHZ
PLZ
PZH
PZL
MAX
Symbol
Switching Characteristics
V
Note 1: “Absolute Maximum Ratings” are those values beyond which the safety of the device cannot be guaranteed. They are not meant to imply that the devices
should be operated at these limits. The table of “Electrical Characteristics” specifies conditions of device operation.
Note 2: Current into device pins is defined as positive. Current out of device pins is defined as negative. All voltages are referenced to ground except: V
∆V
Note 3: All typicals are given for: V
Note 4: The DS90LV047A is a current mode device and only functions within datasheet specifications when a resistive load is applied to the driver outputs typical
range is (90Ω to 110Ω).
Note 5: t
same channel.
Note 6: t
Note 7: t
specification applies to devices at the same V
Note 8: t
operating temperature and voltage ranges, and across process distribution. t
Note 9: Generator waveform for all tests unless otherwise specified: f = 1 MHz, Z
Note 10: ESD Ratings:
Note 11: Output short circuit current (I
Note 12: C
Note 13: All input voltages are for one channel unless otherwise specified. Other inputs are set to GND.
Note 14: f
switching.
Parameter Measurement Information
CC
OD1
= +3.3V
.
SKD1
SKD2
SKD3
SKD4
MAX
HBM (1.5 kΩ, 100 pF) ≥ 10 kV
EIAJ (0 Ω, 200 pF) ≥ 1200 V
L
Differential Propagation Delay High to Low
Differential Propagation Delay Low to High
Differential Pulse Skew |t
(Note 5)
Channel-to-Channel Skew (Note 6)
Differential Part to Part Skew (Note 7)
Differential Part to Part Skew (Note 8)
Rise Time
Fall Time
Disable Time High to Z
Disable Time Low to Z
Enable Time Z to High
Enable Time Z to Low
Maximum Operating Frequency (Note 14)
includes probe and jig capacitance.
, Differential Part to Part Skew, is defined as the difference between the minimum and maximum specified differential propagation delays. This
, part to part skew, is the differential channel-to-channel skew of any event between devices. This specification applies to devices over recommended
|t
is the Differential Channel-to-Channel Skew of any event on the same device.
generator input conditions: t
PHLD
±
10%, T
− t
PLHD
| is the magnitude difference in differential propagation delay time between the positive going edge and the negative going edge of the
A
= −40˚C to +85˚C (Notes 3, 9, 12)
CC
Parameter
OS
= +3.3V, T
) is specified as magnitude only, minus sign indicates direction only.
r
= t
PHLD
CC
f
<
and within 5˚C of each other within the operating temperature range.
A
1 ns (0% to 100%), 50% duty cycle, 0V to 3V. Output Criteria: duty cycle = 45%/55%, VOD
FIGURE 1. Driver V
= +25˚C.
− t
PLHD
|
R
(Figure 2 and Figure 3)
R
(Figure 4 and Figure 5)
SKD4
OD
L
L
3
= 100Ω, C
= 100Ω, C
and V
is defined as |Max − Min| differential propagation delay.
O
= 50Ω, t
Conditions
OS
r
Test Circuit
L
L
≤ 1 ns, and t
= 15 pF
= 15 pF
f
≤ 1 ns.
Min
200
0.5
0.5
10088703
0
0
0
0
Typ
250
0.9
1.2
0.3
0.4
0.5
0.5
2
2
3
3
>
250mV, all channels
Max
1.7
1.7
0.4
0.5
1.0
1.2
1.5
1.5
5
5
7
7
www.national.com
OD1
Units
MHz
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
and