DS90LV047ATMTC National Semiconductor, DS90LV047ATMTC Datasheet

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DS90LV047ATMTC

Manufacturer Part Number
DS90LV047ATMTC
Description
Receiver IC
Manufacturer
National Semiconductor

Specifications of DS90LV047ATMTC

Driver Case Style
TSSOP
No. Of Pins
16
No. Of Driver/receivers
0/4
Peak Reflow Compatible (260 C)
No
Supply Voltage
3.3V
Supply Voltage Max
3.3V
Leaded Process Compatible
No
Mounting Type
Surface Mount
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant

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© 2003 National Semiconductor Corporation
DS90LV047A
3V LVDS Quad CMOS Differential Line Driver
General Description
The DS90LV047A is a quad CMOS flow-through differential
line driver designed for applications requiring ultra low power
dissipation and high data rates. The device is designed to
support data rates in excess of 400 Mbps (200 MHz) utilizing
Low Voltage Differential Signaling (LVDS) technology.
The DS90LV047A accepts low voltage TTL/CMOS input lev-
els and translates them to low voltage (350 mV) differential
output signals. In addition, the driver supports a TRI-STATE
function that may be used to disable the output stage, dis-
abling the load current, and thus dropping the device to an
ultra low idle power state of 13 mW typical. The
DS90LV047A has a flow-through pinout for easy PCB layout.
The EN and EN* inputs are ANDed together and control the
TRI-STATE outputs. The enables are common to all four
drivers. The DS90LV047A and companion line receiver
(DS90LV048A) provide a new alternative to high power
psuedo-ECL devices for high speed point-to-point interface
applications.
Connection Diagram
Truth Table
TRI-STATE
All other combinations of
Order Number DS90LV047ATM, DS90LV047ATMTC
EN
H
ENABLE inputs
®
See NS Package Number M16A, MTC16
ENABLES
is a registered trademark of National Semiconductor Corporation.
L or Open
EN
*
Dual-In-Line
INPUT
D
H
L
X
IN
DS100887
10088701
D
OUT+
H
Z
L
OUTPUTS
D
OUT−
H
L
Z
®
Features
n
n Flow-through pinout simplifies PCB layout
n 300 ps typical differential skew
n 400 ps maximum differential skew
n 1.7 ns maximum propagation delay
n 3.3V power supply design
n
n Low power dissipation (13mW at 3.3V static)
n Interoperable with existing 5V LVDS receivers
n High impedance on LVDS outputs on power down
n Conforms to TIA/EIA-644 LVDS Standard
n Industrial operating temperature range (−40˚C to +85˚C)
n Available in surface mount (SOIC) and low profile
Functional Diagram
TSSOP package
>
±
350 mV differential signaling
400 Mbps (200 MHz) switching rates
10088702
January 2003
www.national.com

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