DSPIC30F3011-20E/PT Microchip Technology, DSPIC30F3011-20E/PT Datasheet - Page 3
DSPIC30F3011-20E/PT
Manufacturer Part Number
DSPIC30F3011-20E/PT
Description
IC,DSP,16-BIT,CMOS,TQFP,44PIN,PLASTIC
Manufacturer
Microchip Technology
Series
dsPIC™ 30Fr
Datasheets
1.DSPIC30F2011-20ISO.pdf
(66 pages)
2.DSPIC30F2011-20IP.pdf
(26 pages)
3.DSPIC30F3010-30ISO.pdf
(228 pages)
4.DSPIC30F3010-30ISO.pdf
(18 pages)
5.DSPIC30F3010-30ISO.pdf
(6 pages)
6.DSPIC30F3010-30ISO.pdf
(16 pages)
7.DSPIC30F3010-30ISO.pdf
(22 pages)
Specifications of DSPIC30F3011-20E/PT
Rohs Compliant
YES
Core Processor
dsPIC
Core Size
16-Bit
Speed
20 MIPS
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, Motor Control PWM, QEI, POR, PWM, WDT
Number Of I /o
30
Program Memory Size
24KB (8K x 24)
Program Memory Type
FLASH
Eeprom Size
1K x 8
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
2.5 V ~ 5.5 V
Data Converters
A/D 9x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
44-TQFP, 44-VQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
XLT80PT3 - SOCKET TRAN ICE 80MQFP/TQFPAC30F006 - MODULE SKT FOR DSPIC30F 44TQFPAC164305 - MODULE SKT FOR PM3 44TQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
DSPIC30F3011-20E/PT
Manufacturer:
Microchip Technology
Quantity:
10 000
- DSPIC30F2011-20ISO PDF datasheet
- DSPIC30F2011-20IP PDF datasheet #2
- DSPIC30F3010-30ISO PDF datasheet #3
- DSPIC30F3010-30ISO PDF datasheet #4
- DSPIC30F3010-30ISO PDF datasheet #5
- DSPIC30F3010-30ISO PDF datasheet #6
- DSPIC30F3010-30ISO PDF datasheet #7
- Current page: 3 of 228
- Download datasheet (4Mb)
High-Performance Modified RISC CPU:
• Modified Harvard Architecture
• C Compiler Optimized Instruction Set Architecture
• 83 Base Instructions
• 24-bit Wide Instructions, 16-bit Wide Data Path
• 24 Kbytes On-Chip Flash Program Space
• 1 Kbyte of On-Chip Data RAM
• 1 Kbyte of Nonvolatile Data EEPROM
• 16 x 16-bit Working Register Array
• Up to 30 MIPs Operation:
• 29 Interrupt Sources
DSP Engine Features:
• Dual Data Fetch
• Accumulator Write Back for DSP Operations
• Modulo and Bit-Reversed Addressing modes
• Two, 40-bit Wide Accumulators with Optional
• 17-bit x 17-bit Single-Cycle Hardware Fractional/
• All DSP Instructions Single Cycle
• ±16-bit Single-Cycle Shift
© 2010 Microchip Technology Inc.
Note:
with Flexible Addressing modes
(8K instruction words)
- DC to 40 MHz external clock input
- 4 MHz-10 MHz oscillator input with
- 3 external interrupt sources
- 8 user-selectable priority levels for each
- 4 processor trap sources
saturation Logic
Integer Multiplier
PLL active (4x, 8x, 16x)
interrupt source
High Performance, 16-Bit Digital Signal Controllers
This data sheet summarizes features of
this group of dsPIC30F devices and is not
intended to be a complete reference
source. For more information on the CPU,
peripherals, register descriptions and
general device functionality, refer to the
“dsPIC30F Family Reference Manual”
(DS70046). For more information on the
device instruction set and programming,
refer to the “16-bit MCU and DSC
Programmer’s
(DS70157).
Reference
Manual”
dsPIC30F3010/3011
Peripheral Features:
• High-Current Sink/Source I/O Pins: 25 mA/25 mA
• Timer module with Programmable Prescaler:
• 16-bit Capture Input Functions
• 16-bit Compare/PWM Output Functions
• 3-Wire SPI modules (supports 4 Frame modes)
• I
• 2 UART modules with FIFO Buffers
Motor Control PWM Module Features:
• 6 PWM Output Channels
• 3 Duty Cycle Generators
• Dedicated Time Base
• Programmable Output Polarity
• Dead-Time Control for Complementary mode
• Manual Output Control
• Trigger for A/D Conversions
Quadrature Encoder Interface Module
Features:
• Phase A, Phase B and Index Pulse Input
• 16-bit Up/Down Position Counter
• Count Direction Status
• Position Measurement (x2 and x4) mode
• Programmable Digital Noise Filters on Inputs
• Alternate 16-bit Timer/Counter mode
• Interrupt on Position Counter Rollover/Underflow
Analog Features:
• 10-bit Analog-to-Digital Converter (ADC) with
• Programmable Brown-out Reset
- Five 16-bit timers/counters; optionally pair
and 7-bit/10-bit Addressing
- Complementary or Independent Output
- Edge and Center-Aligned modes
4 Sample and Hold (S&H) Inputs:
- 1 Msps conversion rate
- 9 input channels
- Conversion available during Sleep and Idle
2
C
16-bit timers into 32-bit timer modules
modes
TM
module Supports Multi-Master/Slave mode
DS70141F-page 3
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