EP9301-IQZ Cirrus Logic Inc, EP9301-IQZ Datasheet - Page 21

• Manufacturer Part Number: EP9301-IQZ
• Description: 32-Bit Microcontroller IC
• Manufacturer: Cirrus Logic Inc
• Series: EP9r

Specifications of EP9301-IQZ

• Controller Family/series: (ARM9)
• Core Size: 32 Bit
• A/d Converter: 12 Bits
• Supply Voltage: 3.3V
• No. Of I/o Pins: 24
• Mounting Type: Surface Mount
• Operating Temperature Min: -40°C
• Package / Case: 208-LQFP
• Core Processor: ARM9
• Speed: 166MHz
• Connectivity: EBI/EMI, Ethernet, I²C, IrDA, SPI, UART/USART, USB
• Peripherals: AC'97, DMA, I&sup2:S, LED, MaverickKey, POR, PWM, WDT
• Number Of I /o: 19
• Program Memory Type: ROMless
• Ram Size: 32K x 8
• Voltage - Supply (vcc/vdd): 1.65 V ~ 3.6 V
• Data Converters: A/D 5x12b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Processor Series: EP93xx
• Core: ARM920T
• Data Bus Width: 32 bit
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: MDK-ARM, RL-ARM, ULINK2
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -
• Lead Free Status / Rohs Status: Details
• Other names: 598-1250

Static Memory 32-bit Write on 16-bit External Bus
DS636F2
AD setup to WRn assert time
WRn/DQMn deassert to AD transition time
AD hold from WRn deassert time
CSn hold from WRn deassert time
CSn to WRn assert delay time
WRn assert time
WRn deassert time
CSn to DQMn assert delay time
DQMn assert time
DQMn deassert time
WRn / DQMn deassert to DA transition time
WRn / DQMn assert to DA valid time
DQMn
WAIT
WRn
RDn
CSn
AD
DA
Parameter
t
ADs
t
DQMd
t
WRd
Figure 9. Static Memory Multiple Word Write 16-bit Cycle Timing Measurement

t
DAV
Copyright 2010 Cirrus Logic (All Rights Reserved)
Symbol
t
t
t
t
t
DQMpwH
WRpwL
t
DQMpwL
DQpwL
WRpwH
t
WRpwL
t
t
DQMd
t
t
t
t
t
DAh1
WRd
ADs
ADd
ADh
CSh
DAV
t
t
HCLK
HCLK
t
Min
HCLK
t
DAh
7
-
-
-
-
-
-
-
-
t
t
– 3
× 2
WRpwH
DQpwH
t
ADd
t
t
Entry Level ARM9 System-on-Chip Processor
HCLK
HCLK
t
DAV
× (WST1 + 1)
× (WST1 + 1)
Typ
-
-
-
-
-
-
-
-
-
-
t
t
WRpwL
DQpwL
t
ADh
(t
(t
HCLK
HCLK
t
HCLK
Max
× 2) + 14
2
1
8
× 2) + 7
-
-
-
-
-
-
+ 6
t
CSh
t
DAh
EP9301
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
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