EPM7256BTC100-10N Altera, EPM7256BTC100-10N Datasheet - Page 54

• Manufacturer Part Number: EPM7256BTC100-10N
• Description: MAX 7000/S/AE/B
• Manufacturer: Altera

Specifications of EPM7256BTC100-10N

• Rohs Compliant: YES

MAX 7000B Programmable Logic Device Data Sheet
Notes to tables:
(1)
(2)
(3)
(4)
Power
Consumption
54
PCI
Table 32. EPM7512B Selectable I/O Standard Timing Adder Delays (Part 2 of 2)
These values are specified under the Recommended Operating Conditions in
more information on switching waveforms.
These values are specified for a PIA fan-out of one LAB (16 macrocells). For each additional LAB fan-out in these
devices, add an additional 0.12 ns to the PIA timing value.
Measured with a 16-bit loadable, enabled, up/down counter programmed into each LAB.
The t
running in low-power mode.
I/O Standard
LPA
parameter must be added to the t
Input to PIA
Input to global clock and clear
Input to fast input register
All outputs
Supply power (P) versus frequency (f
devices is calculated with the following equation:
P = P
The P
and switching frequency, can be calculated using the guidelines given in
Application Note 74 (Evaluating Power for Altera Devices).
Parameter
INT
IO
value, which depends on the device output load characteristics
+ P
IO
LAD
= I
, t
CCINT
LAC
, t
IC
, t
× V
ACL
Min
CC
, t
CPPW
-5
+ P
Max
0.0
0.0
0.0
0.0
IO
, t
EN
MAX
, and t
Speed Grade
Min
Table 15 on page
, in MHz) for MAX 7000B
SEXP
-7
Max
0.0
0.0
0.0
0.0
parameters for macrocells
Note (1)
Altera Corporation
Min
29. See
-10
Max
0.0
0.0
0.0
0.0
Figure 14
Unit
ns
ns
ns
ns
for