KS8721BL Micrel Inc, KS8721BL Datasheet
KS8721BL
Specifications of KS8721BL
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KS8721BL Summary of contents
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... General Description Operating with a 2.5V core to meet low-voltage and low- power requirements, the KS8721BL and KS8721SL are 10BASE-T/100BASE-TX/FX Physical Layer Transceivers that use MII and RMII interfaces to transmit and receive data. They contain 10BASE-T Attachment (PMA), Physical Medium Dependent (PMD), and Physical Coding Sub-layer (PCS) functions. The KS8721BL/SL also have on-chip 10BASE-T output fi ...
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... C to +85 o KSZ8721SLI – +85 June 2009 • KS8721BL is a drop-in replacement for the KS8721BT in the same footprint • KS8721SL is a drop-in replacement for the KS8721B in the same footprint • Commercial Temperature Range: 0 • Industrial Temperature Range: –40 • Available in 48-pin SSOP and LQFP ...
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... Updated electrical characteristics. Updated reference schematic for strapping option configuration to 3.3V. Crystal spec updated to 40Ω series resistance. Added additional magnetics to qualified transformer table. Added 2 lead-free part options. Added recommended reset circuit. 1.3 06/25/09 Update ordering information. June 2009 3 KS8721BL/SL M9999-062509-1.3 ...
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... Register 6h - Auto-Negotiation Expansion.................................................................................................................... 21 Register 7h - Auto-Negotiation Next Page.................................................................................................................... 21 Register 8h - Link Partner Next Page Ability ................................................................................................................ 22 Register 15h - RXER Counter....................................................................................................................................... 22 Register 1bh - Interrupt Control/Status Register .......................................................................................................... 22 Register 1fh - 100BASE-TX PHY Controller................................................................................................................. 23 (1) Absolute Maximum Ratings ........................................................................................................................................ 24 (2) Operating Ratings ........................................................................................................................................................ 24 (4) Electrical Characteristics ............................................................................................................................................ 24 June 2009 4 KS8721BL/SL M9999-062509-1.3 ...
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... Micrel, Inc. Timing Diagrams ............................................................................................................................................................. 26 Selection of Isolation Transformers Selection of Reference Crystal ...................................................................................................................................... 33 Package Information ....................................................................................................................................................... 34 June 2009 (1) ........................................................................................................................... 33 5 KS8721BL/SL M9999-062509-1.3 ...
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... MDIO 36 GND MDC 35 GND RXD1/PHYAD1 RXD2/PHYAD2 34 FXSD/FXEN RXD1/PHYAD3 33 RX+ RXD0/PHYAD4 VDDIO 32 RX- GND RXDV/PCS_LPBK 31 VDDRX RXC 30 PD# RXER/ISO GND 29 LED3/NWAYEN 28 LED2/DUPLEX 27 LED1/SPD100 26 LED0/TEST 25 INT#/PHYAD0 6 KS8721BL/SL GND GND FXSD/FXEN RX+ RX– VDDRX PD# LED3/NWAYEN LED2/DUPLEX LED1/SPD100 LED0/TEST INT#/PHYAD0 48-Pin LQFP (LQ) M9999-062509-1.3 ...
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... During reset, the pull-up/pull-down value is latched as RMII select. See “Strapping Options” section for details. MII Carrier Sense Output. During reset, the pull-up/pull-down value is latched as RMII back-to-back mode when RMII mode is selected. See “Strapping Options” section for details. Ground. 7 KS8721BL/SL M9999-062509-1.3 ...
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... Transmitter 2.5V power supply. See “Circuit Design Ref. for Power Supply” section for details. Ground. 8 LED Definition PHYAD0 “Off” “On” “Toggle” LED Definition “Off” “On” LED Definition “Off” “On” LED Definition “Off” “On” KS8721BL/SL M9999-062509-1.3 ...
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... Crystal Oscillator Input: Input for a crystal or an external 25MHz clock oscillator is used, XI connects to a 3.3V tolerant oscillator, and no-connect. Analog PLL 2.5V power supply. See “Circuit Design Ref. for Power Supply” section for details. Chip Reset. Active low, minimum of 50µs pulse is required. 9 KS8721BL/SL M9999-062509-1.3 ...
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... Latched into Register 0h bit 8 during power-up/reset Half-duplex, PU (default) = Full-duplex. If Duplex is pulled up during reset, this pin is also latched as the Duplex support in register 4h. Nway (auto-negotiation) Enable. Latched into Register 0h bit 12 during power-up/reset Disable Auto-Negotiation, PU (default) = Enable Auto-Negotiation. Ipu Power-Down Enable. PU (default) = Normal operation Power-Down mode. 10 KS8721BL/SL M9999-062509-1.3 ...
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... RX+ or RX- input from falsely triggering the decoder. When the input exceeds the squelch limit, the PLL locks onto the incoming signal and the KS8721BL/SL decodes a data frame. This activates the carrier sense (CRS) and RXDV signals and makes the receive data (RXD) available. The receive clock is maintained active during idle periods in between data reception ...
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... Transmit Clock (TXC) The transmit clock is normally generated by the KS8721BL/SL from an external 25MHz reference source at the X1 input. The transmit data and control signals must always be synchronized to the TXC by the MAC. The KS8721BL/SL normally samples these signals on the rising edge of the TXC. ...
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... Whenever the KS8721BL/SL receives an error symbol from the network, it asserts RXER and drives “1110” (4B) on the RXD pins. When the MAC asserts TXER, the KS8721BL/SL will drive “H” symbols (a Transmit Error defined in the IEEE 802.3 4B/5B code group) out on the line to force signaling errors. ...
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... PHY is capable of detecting, and that may otherwise be undetectable by the MAC sub- layer) is detected somewhere in the frame presently being transferred from the PHY. RX_ER transitions synchronously with respect to REF_CLK. While CRS_DV is de-asserted, RX_ER has no effect on the MAC. June 2009 14 KS8721BL/SL M9999-062509-1.3 ...
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... See “Register 1fh–100BASE-TX PHY Controller” section for details. 10/100 BASE-T Media Dependent Interface Transmit Pair Receive Pair Modular Connector (RJ45) June 2009 NIC Figure 1. Straight Through Cable 15 KS8721BL/SL Min Typ Max 10/100 BASE-T Media Dependent Interface ...
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... Power-Saving Mode: This mode can be disabled by writing to Register 1fh.10. The KS8721BL/SL turns off everything except for the Energy Detect and PLL circuits when the cable is not installed. In other words, the KS8721BL/SL shuts down most of the internal circuits to save power if there is no link. Power-saving mode is in the most effective state when auto-negotiation mode is enabled. ...
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... Options” section. Media Converter Operation The KS8721BL/SL is capable of performing media conversion with two parts in a back-to-back RMII loop-back mode as indicated in the diagram. Both parts are in RMII mode and with RMII BTB asserted (pins 21 and 22 strapped high). One part is operating in TX mode and the other is operating in FX mode. Both parts can share a common 50MHz oscillator. ...
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... Circuit Design Reference for Power Supply Micrel’s integrated built-in, voltage regulator technology and thoughtful implementation allows the user to save BOM cost on both existing and future designs with the use of the new KS8721BL/SL single supply, single port 10/100 Ethernet PHY. +3.3V +2 ...
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... PHY from MII and TX+/TX normal operation 1 = restart auto-negotiation process 0 = normal operation. Bit is self-clearing 1 = full-duplex 0 = half-duplex 1 = enable COL test 0 = disable COL test 0 = enable transmitter 1 = disable transmitter capable 0 = not T4 capable 1 = capable of 100BASE-X full-duplex 0 = not capable of 100BASE-X full-duplex 19 KS8721BL/SL (1) Default Mode RW/ Set by SPD100 RW Set by NWAYEN RW ...
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... Six bit manufacturer’s model number Four bit manufacturer’s model number 1 = next page capable next page capability 1 = remote fault supported remote fault 1 = pause function supported pause function capable capability with full-duplex full-duplex capability capable capability 1 = 10Mbps with full-duplex 10Mbps full-duplex capability 20 KS8721BL/SL (1) Default Mode RO/LH ...
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... KS8721BL/SL (1) Default Mode 00001 RO 0 ...
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... Disable link up interrupt 1 = Jabber interrupt occurred 0 = Jabber interrupt has not occurred 1 = Receive error occurred 0 = Receive error has not occurred 1 = Page receive occurred 0 = Page receive has not occurred 1 = Parallel detect fault occurred 0 = Parallel detect fault has not occurred 22 KS8721BL/SL (1) Default Mode 001 ...
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... No flow control 1 = PHY in isolate mode 0 = Not isolated [000] = Still in auto-negotiation [001] = 10BASE-T half-duplex [010] = 100BASE-TX half-duplex [011] = Reserved [101] = 10BASE-T full-duplex [110] = 100BASE-TX full-duplex [111] = PHY/MII isolate 1 = Enable SQE test 0 = Disable 1 = Disable scrambler 0 = Enable 23 KS8721BL/SL (1) Default Mode RO/SC 0 RO/SC 0 RO/SC 0 RO/ ...
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... V DD_PLL DD_TX DD_RXC DD_RCV ) .............................................................. +3.3V DDIO ) A ( Airflow ........................................... 83.56°C Airflow ........................................... 75.19°C/W Min Typ 116 151 47 4 1/2V (I/O) DD +0.2 –10 1/2V (I/ 0.75 45 0.7 KS8721BL/SL ) ......... +2.5V DDC Max Units 0 µ µA kΩ 110 ns 1. 0.5 ns ±0 1.4 ns (pp) M9999-062509-1 ...
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... (HS) heat spreader in this package. 4. Specification for packaged product only. 5. There is 100% data transmission in full-duplex mode and a minimum IPG with a 130-meter cable. June 2009 5MHz square wave 50W from each output 50W from each output KS8721BL/ 400 mV 2.2 2.8 V ±3 MHz ...
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... CRS2 t TXEN High to TXP/TXM Output (TX Latency) LAT t COL (SQE) Delay After TXEN De-Asserted SQE t COL (SQE) Pulse Duration SQEP Note: 1. 1BT = 10ns at 10BASE-TX June 2009 Figure 4. 10BASE-T MII Transmit Timing Table 3. 10BASE-T MII Transmit Timing Parameters 26 KS8721BL/SL Min Typ Max Units ( ...
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... HD3 t TXEN High to CRS Asserted Latency CRS1 t TXEN Low to CRS De-Asserted Latency CRS2 t TXEN High to TXP/TXM Output (TX Latency) LAT Note: 1. 1BT = 10ns at 100BASE-TX June 2009 Figure 5. 100BASE-T MII Transmit Timing Table 4. 100BASE-T MII Transmit Timing Parameters 27 KS8721BL/SL Min Typ Max Units (1) 4 ...
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... HD t CRS to RXD Latency Aligned RLAT t “Start of Stream” to CSR Asserted CRS1 t “End of Stream” to CSR De-Asserted CRS2 June 2009 Start of End of Stream Stream Figure 6. 100BASE-T MII Receive Timing Table 5. 100BASE-T MII Receive Timing Parameters 28 KS8721BL/SL Min Typ Max Units 106 ...
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... FLPW t Clock/Data Pulse Width PW t Clock Pulse to Data Pulse CTD t Clock Pulse to Clock Pulse CTC Number of Clock/Data Pulses per Burst Table 6. Auto-Negotiation/Fast Link Pulse Timing Parameters June 2009 Figure 7. Auto-Negotiation/Fast Link Pulse Timing 29 KS8721BL/SL Min Typ Max Units 100 ns 69 µs 136 µ ...
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... P t MDIO Set-Up to MDC (MDIO as Input) MD1 t MDIO Hold After MDC (MDIO as Input) MD2 t MDC to MDIO Valid (MDIO as Output) MD3 June 2009 Figure 8. Serial Management Interface Timing Table 7. Serial Management Interface Timing Parameters 30 KS8721BL/SL Min Typ Max Units 400 222 ns M9999-062509-1.3 ...
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... Stable Supply Voltages to Reset High sr Reset Circuit Diagram Micrel recommends the following discrete reset circuit as shown in Figure 10 when powering up the KS8721BL/SL device. For the application where the reset circuit signal comes from another device (e.g., CPU, FPGA, etc), we recommend the reset circuit as shown in Figure 11. ...
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... Figure 12 shows the reference circuit for strapping option pins. Reference circuits for unmanaged programming through LED ports. June 2009 D1: 1N4148 D1 KS8721BL/SL RST 10µF Pull-Up LED pin KS8721BL/SL Pull-down LED pin KS8721BL/SL Figure 12. Reference Circuit, Strapping Option Pins 32 VCC R 10k C 3.3V 3.3V KS8721BL/SL M9999-062509-1.3 ...
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... Value 25 ± 100 20 40 Part Number H1102 S558-5999-U7 PT163020 HB726 LF8505 LF-H41S J0011D21 J00-0061 Table 9. Qualified Transformer Lists 33 KS8721BL/SL Test Condition 100mV, 100kHz, 8mA 1MHz (min) 0MHz – 65MHz Units MHz ppm pF Ω Auto MDIX Number of Ports Yes 1 Yes 1 Yes ...
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... Micrel, Inc. Package Information June 2009 48-Pin SSOP (SM) 34 KS8721BL/SL M9999-062509-1.3 ...
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... A Purchaser’s use or sale of Micrel Products for use in life support appliances, devices or systems is a Purchaser’s own risk and Purchaser agrees to fully indemnify Micrel for any damages resulting from such use or sale. June 2009 48-Pin LQFP (LQ) © 2004 Micrel, Incorporated. 35 KS8721BL/SL M9999-062509-1.3 ...