KSZ8695P-MMB-EVAL Micrel Inc, KSZ8695P-MMB-EVAL Datasheet - Page 44

• Manufacturer Part Number: KSZ8695P-MMB-EVAL
• Description: KSZ8695P-MMB Eval Kit
• Manufacturer: Micrel Inc

Specifications of KSZ8695P-MMB-EVAL

• Limit 5 Boards/cust.: For Experimental Use Only
• Main Purpose: Interface, Ethernet
• Utilized Ic / Part: KSZ8695P-MMB
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Secondary Attributes: -
• Embedded: -
• Primary Attributes: -
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 576-1623

Clock Dividers/Generators (Continued)
Part Number
SY10/100EL34/L
SY10/100EL38/L
Registers and Flip-Flops
Part Number
SY10/100E131
SY10/100E141
SY10/100E142
SY10/100E151
SY10/100E451
SY10/100E452
SY10/100EL31
SY10/100EL35
SY10/100EL51
SY10/100EL52
SY100S331
SY100S351
SY100S341
SY10/100S891
Receivers/Buffers/Drivers
Part Number
SY54016R
SY54016AR
SY56016R
SY56216R
SY58016L
SY58600U
SY58601U
SY58602U
SY58603U
SY58604U
SY58605U
SY58620L
SY89206V
SY89207L
SY89216V
SY89250V
SY89306V
SY89307V
SY89316V
SY89835U
SY89850U
SY10/100E112
SY10/100E116
SY10/100E416
February 2011
Precision Edge
Fanout
Buffer
Y
Y
Input
ANY
ANY
ANY
ANY
CML/PECL
ANY
ANY
ANY
ANY
ANY
ANY
ANY
ECL/PECL
LVECL/LVPECL
ECL/PECL
ECL/PECL
ECL/PECL
ECL/PECL
ECL/PECL
LVDS
CML/PECL/LVDS
ECL/PECL
ECL/PECL
ECL/PECL
Input
ECL
ECL
Channel
Quad
Single
Single
Single
Single
Single
Single
Single
Single
Single
Single
Single
Single
Single
Output
CML
CML
CML
CML
CML
CML
LVPECL
RS-LVPECL
CML
LVPECL
LVDS
CML
ECL/PECL
PECL
ECL/PECL
ECL/PECL
ECL/PECL
ECL/PECL
ECL/PECL
LVDS
LVPECL
ECL/PECL
ECL/PECL
ECL/PECL
®
Selection Guide
Voltage
5
5
5
5
5
5
5
5
5
5
5
5
5
5
Voltage
1.2/1.8V
1.2/1.8V
1.2/1.8/2.5V
1.2/1.8/2.5V
3.3V
2.5/3.3V
2.5/3.3V
2.5/3.3V
2.5/3.3V
2.5/3.3V
2.5V
3.3V
3.3/5V
3.3V
3.3/5V
3.3/5V
3.3/5V
3.3/5V
3.3/5V
2.5V
2.5/3.3V
5V
5V
5V
Output
ECL
ECL
Max. Data
Rate (Gbps) (GHz)
3.2
3.2
6.4
6.4
10.7
10.7
5
10.7
4.25
3.2
3.2
4.25
—
—
—
—
—
2.5
—
3.2
3.2
—
—
—
43
Voltage
3.3/5
3.3/5
Max. Feq.
1.1
0.7
0.7
1.1
1.1
1.1
2.8
2.2
2.8
2.0
0.8
0.7
0.6
Max. Freq.
2.5
3.2
5
5
7
7
5
7
2.5
2.5
2
2.5
1
0.8
1
—
2.5
—
2.5
2
4
—
—
—
Max. Freq.
(GHz)
—
—
Package
MLF
MLF
MLF
MLF
MLF
MLF
MLF
MLF
MLF
MLF
MLF
MLF
MLF
MSOP-10
MLF
MLF
MLF
MLF
MLF
MLF
MLF
PLCC-28
PLCC-28
PLCC-28
®
®
®
®
®
®
®
®
®
®
®
®
®
®
®
®
®
®
®
®
-8 (2 x 2mm)
-8 (2 x 2mm)
-10 (2 x 2mm)
-16 (3 x 3mm)
-16 (3 x 3mm)
-8 (2 x 2mm)
-8 (2 x 2mm)
-8 (2 x 2mm)
-8 (2 x 2mm)
-8 (2 x 2mm)
-8 (2 x 2mm)
-24 (4 x 4mm)
-8 (2 x 2mm)
-8 (2 x 2mm)
-8 (2 x 2mm)
-8 (2 x 2mm)
-8 (2 x 2mm)
-8 (2 x 2mm)
-8 (2 x 2mm)
-8 (2 x 2mm)
Package
PLCC-28
PLCC-28
PLCC-28
PLCC-28
PLCC-28
PLCC-28
PLCC-28
SOIC-8
SOIC-8
SOIC-8
PLCC-28
PLCC-28
PLCC-28
PLCC-28
Package
SOIC-16
SOIC-20
Description
Low Voltage CML Translator with Fail-Safe Input.
Low Voltage CML Translator.
Differential Line Driver with EQ.
Dual Channel EQ Receiver.
Differential CML Line Driver/Receiver.
Line Driver/Receiver.
Line Driver/Receiver.
Line Driver with 400mV Output Swing.
Line/Driver Receiver with Fail-Safe Input.
Line/Driver Receiver with Fail-Safe Input.
Line/Driver Receiver with Fail-Safe Input.
Backplane Transceiver.
Receiver/Buffer-100k Comp.
Amp. w/Low-Gain Feedback.
Receiver/Buffer-10k Comp.
Enhanced Differential Receiver.
Receiver/Buffer-100k Comp.
Variable Output Swing Differential Receiver.
Differential Receiver/Buffer-10k Comp.
Buffer with Fail-Safe Input.
Low Power.
Quad Driver.
Quint Differential Line Driver.
Quint Differential Line Driver.
Description
3 Outputs ÷2, 4, or 8.
2 Banks (÷2) ,(÷4/6).
Description
4-Bit D Flip Flop.
8-Bit Shift Register.
9-Bit Shift Register.
6-Bit D Register.
6-Bit D Register.
5-Bit D Register
D Flip Flop w/ Set and Reset.
JK Flip Flop.
Differential Clock D Flip Flop.
Differential Data and Clock D Flip Flop
Triple D Flip Flop.
Hex D Flip Flop.
8-Bit Shift Register.
5-Bit Registered Transceiver.
Micrel, Incorporated