LM4936MH National Semiconductor, LM4936MH Datasheet - Page 17

• Manufacturer Part Number: LM4936MH
• Description: IC,Audio Amplifier,DUAL,TSSOP,28PIN,PLASTIC
• Manufacturer: National Semiconductor

Specifications of LM4936MH

• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

Application Information
I
The LM4936 uses a serial bus, which conforms to the I
protocol, to control the chip’s functions with two wires: clock
(SCL) and data (SDA). The clock line is uni-directional. The
data line is bi-directional (open-collector). The maximum
clock frequency specified by the I
this discussion, the master is the controlling microcontroller
and the slave is the LM4936.
The I
ID/CE pin. The LM4936’s two possible I
are of the form 110110X
logic low; and X
interface is used to address a number of chips in a system,
the LM4936’s chip address can be changed to avoid any
possible address conflicts.
The bus format for the I
bus format diagram is broken up into six major sections:
The "start" signal is generated by lowering the data signal
while the clock signal is high. The start signal will alert all
devices attached to the I
dress against their own address.
The 8-bit chip address is sent next, most significant bit first.
The data is latched in on the rising edge of the clock. Each
address bit must be stable while the clock level is high.
After the last bit of the address bit is sent, the master
releases the data line high (through a pull-up resistor). Then
the master sends an acknowledge clock pulse. If the
LM4936 has received the address correctly, then it holds the
data line low during the clock pulse. If the data line is not
held low during the acknowledge clock pulse, then the mas-
ter should abort the rest of the data transfer to the LM4936.
The 8 bits of data are sent next, most significant bit first.
Each data bit should be valid while the clock level is stable
high.
After the data byte is sent, the master must check for another
acknowledge to see if the LM4936 received the data.
If the master has more data bytes to send to the LM4936,
then the master can repeat the previous two steps until all
data bytes have been sent.
The "stop" signal ends the transfer. To signal "stop", the data
signal goes high while the clock signal is high. The data line
should be held high when not in use.
I
The LM4936’s I
I
a voltage level set by the I
independent to that of the main power supply pin V
is ideal whenever logic levels for the I
dictated by a microcontroller or microprocessor that is oper-
ating at a lower supply voltage than the main battery of a
portable system.
EXPOSED-DAP PACKAGE PCB MOUNTING
CONSIDERATIONS
Exposed-DAP (die attach paddle) packages provide a low
thermal resistance between the die and the PCB to which
the part is mounted and soldered. This allows rapid heat
transfer from the die to the surrounding PCB copper traces,
ground plane and, finally, surrounding air. The result is a low
voltage audio power amplifier that produces 2.1W at ≤ 1%
THD with a 4Ω load. This high power is achieved through
2
2
2
C COMPATIBLE INTERFACE
C/SPI INTERFACE POWER SUPPLY PIN (I
C/SPI V
2
C address for the LM4936 is determined using the
DD
pin. The LM4936’s I
2
C/SPI interface is powered up through the
1
= 1, if ID/CE is logic high. If the I
2
1
C interface is shown in Figure 5. The
0 (binary), where X
2
C bus to check the incoming ad-
2
C/SPI V
2
C/SPI interface operates at
2
C standard is 400kHz. In
DD
pin which can be set
2
C/SPI interface are
2
C chip addresses
1
= 0, if ID/CE is
2
C/SPI V
DD
. This
DD
2
2
)
C
C
17
careful consideration of necessary thermal design. Failing to
optimize thermal design may compromise the LM4936’s high
power performance and activate unwanted, though neces-
sary, thermal shutdown protection.
The packages must have their exposed DAPs soldered to a
grounded copper pad on the PCB. The DAP’s PCB copper
pad is connected to a large grounded plane of continuous
unbroken copper. This plane forms a thermal mass heat sink
and radiation area. Place the heat sink area on either outside
plane in the case of a two-sided PCB, or on an inner layer of
a board with more than two layers. Connect the DAP copper
pad to the inner layer or backside copper heat sink area with
vias. The via diameter should be 0.012in–0.013in with a
1.27mm pitch. Ensure efficient thermal conductivity by
plating-through and solder-filling the vias.
Best thermal performance is achieved with the largest prac-
tical copper heat sink area. If the heatsink and amplifier
share the same PCB layer, a nominal 2.5in
necessary for 5V operation with a 4Ω load. Heatsink areas
not placed on the same PCB layer as the LM4936 should be
5in
The last two area recommendations apply for 25˚C ambient
temperature. Increase the area to compensate for ambient
temperatures above 25˚C. In systems using cooling fans, the
LM4936MH can take advantage of forced air cooling. With
an air flow rate of 450 linear-feet per minute and a 2.5in
exposed copper or 5.0in
the LM4936MH can continuously drive a 3Ω load to full
power. In all circumstances and conditions, the junction tem-
perature must be held below 150˚C to prevent activating the
LM4936’s thermal shutdown protection. The LM4936’s
power de-rating curve in the Typical Performance Charac-
teristics shows the maximum power dissipation versus tem-
perature. Example PCB layouts are shown in the Demon-
stration Board Layout section. Further detailed and
specific information concerning PCB layout, fabrication, and
mounting is available in National Semiconductor’s AN1187.
PCB LAYOUT AND SUPPLY REGULATION
CONSIDERATIONS FOR DRIVING 3Ω AND 4Ω LOADS
Power dissipated by a load is a function of the voltage swing
across the load and the load’s impedance. As load imped-
ance decreases, load dissipation becomes increasingly de-
pendent on the interconnect (PCB trace and wire) resistance
between the amplifier output pins and the load’s connec-
tions. Residual trace resistance causes a voltage drop,
which results in power dissipated in the trace and not in the
load as desired. For example, 0.1Ω trace resistance reduces
the output power dissipated by a 4Ω load from 2.1W to 2.0W.
This problem of decreased load dissipation is exacerbated
as load impedance decreases. Therefore, to maintain the
highest load dissipation and widest output voltage swing,
PCB traces that connect the output pins to a load must be as
wide as possible.
Poor power supply regulation adversely affects maximum
output power. A poorly regulated supply’s output voltage
decreases with increasing load current. Reduced supply
voltage causes decreased headroom, output signal clipping,
and reduced output power. Even with tightly regulated sup-
plies, trace resistance creates the same effects as poor
supply regulation. Therefore, making the power supply
traces as wide as possible helps maintain full output voltage
swing.
2
(min) for the same supply voltage and load resistance.
2
inner layer copper plane heatsink,
2
(min) area is
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2