LM75CIMX-3 National Semiconductor, LM75CIMX-3 Datasheet - Page 8

• Manufacturer Part Number: LM75CIMX-3
• Description: IC,TEMPERATURE SENSOR,SOP,8PIN,PLASTIC
• Manufacturer: National Semiconductor

Specifications of LM75CIMX-3

• Rohs Compliant: NO

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1.0 Functional Description
above the nominal 1.7V power up threshold, the internal
registers are reset to the power up default values listed
above.
1.3 I
The LM75 operates as a slave on the I
line is an input (no clock is generated by the LM75) and the
SDA line is a bi-directional serial data path. According to I
bus specifications, the LM75 has a 7-bit slave address. The
Note 14: These interrupt mode resets of O.S. occur only when LM75 is read or placed in shutdown. Otherwise, O.S. would remain active indefinitely for any event.
2
C BUS INTERFACE
FIGURE 4. O.S. Output Temperature Response Diagram
2
C bus, so the SCL
(Continued)
2
C
8
four most significant bits of the slave address are hard wired
inside the LM75 and are “1001”. The three least significant
bits of the address are assigned to pins A2–A0, and are set
by connecting these pins to ground for a low, (0); or to +V
for a high, (1).
Therefore, the complete slave address is:
MSB
1
0
0
1
A2
01265807
A1
LSB
A0
S