LM96000CIMT National Semiconductor, LM96000CIMT Datasheet - Page 19

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LM96000CIMT

Manufacturer Part Number
LM96000CIMT
Description
IC,Data Acquisition System,7-CHANNEL,8-BIT,TSSOP,24PIN,PLASTIC
Manufacturer
National Semiconductor
Datasheets

Specifications of LM96000CIMT

Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant

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Register
Address
5Fh
60h
61h
Functional Description
4.15 Registers 5F-61h: Auto Fan Speed Range, PWM Frequency
In Auto Fan Mode, when the temperature for a zone is above the Temperature Limit (Registers 67-69h) and below its Absolute
Temperature Limit (Registers 6A-6Ch), the speed of a fan assigned to that zone is determined as follows.
When the temperature reaches the Fan Temp Limit for a zone, the PWM output assigned to that zone will be Fan PWM Minimum.
Between Fan Temp Limit and (Fan Temp Limit + Range), the PWM duty cycle will increase linearly according to the temperature
as shown in the figure below. The PWM duty cycle will be 100% at (Fan Temp Limit + Range).
Example for PWM1 assigned to Zone 1:
In this case, the PWM1 duty cycle will be 50% at 50˚C.
Since (Zone 1 Fan Temp Limit) + (Zone 1 Range) = 50˚C + 8˚C = 58˚C, the fan will run at 100% duty cycle when the temperature
of the Zone 1 sensor reaches 58˚C.
Since the midpoint of the fan control range is 54˚C, and the median duty cycle is 75% (Halfway between the PWM Minimum and
100%), PWM1 duty cycle would be 75% at 54˚C.
– Zone 1 Fan Temp Limit (Register 67h) is set to 50˚C (32h).
– Range (Register 5Fh) is set to 8˚C (6xh).
– Fan 1 PWM Minimum (Register 64h) is set to 50% (32h).
Read/
Write
R/W
R/W
R/W
Register
Name
Zone1 Range/Fan1
Frequency
Zone2 Range/Fan2
Frequency
Zone3 Range/Fan3
Frequency
SPIN[2:0]
000
001
010
011
100
101
110
111
FIGURE 1. Fan Activity above Fan Temp Limit
(Continued)
Bit 7
(MSB)
RAN3
RAN3
RAN3
TABLE 5. Fan Spin-Up Register
Bit 6
RAN2
RAN2
RAN2
Bit 5
RAN1
RAN1
RAN1
Spin Up Time
0 sec
100 ms
250 ms
400 ms
700 ms
1000 ms
2000 ms
4000 ms
19
Bit 4
RAN0
RAN0
RAN0
Bit 3
HLFRQ
HLFRQ
HLFRQ
Bit 2
FRQ2
FRQ2
FRQ2
Bit 1
FRQ1
FRQ1
FRQ1
Bit 0
(LSB)
FRQ0
FRQ0
FRQ0
20084606
Default
Value
C4h
C4h
C4h
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