MF10CCWM National Semiconductor, MF10CCWM Datasheet - Page 17

• Manufacturer Part Number: MF10CCWM
• Description: IC,FILTER,AP/BP/HP/LP/NOTCH,CMOS,SOP,20PIN,PLASTIC
• Manufacturer: National Semiconductor

Specifications of MF10CCWM

• Rohs Compliant: NO

3 0 Applications Information
For most applications the outputs are AC coupled and DC
offsets are not bothersome unless large signals are applied
to the filter input However larger offset voltages will cause
clipping to occur at lower AC signal levels and clipping at
any of the outputs will cause gain nonlinearities and will
change f
become excessively large if R2 and R4 are used to make
f
cially if Q is also high An extreme example is a bandpass
filter having unity gain a Q of 20 and f
pin 12 tied to ground (100 1 nominal) R4 R2 will therefore
be equal to 6 25 and the offset voltage at the lowpass out-
put will be about
can be adjusted by using the circuit of Figure 20 This allows
adjustment of V
different outputs as described in the above equations Some
outputs cannot be adjusted this way in some modes how-
ever (V
3 5 SAMPLED DATA SYSTEM CONSIDERATIONS
The MF10 is a sampled data filter and as such differs in
many ways from conventional continuous-time filters An im-
portant characteristic of sampled-data systems is their ef-
fect on signals at frequencies greater than one-half the
sampling frequency (The MF10’s sampling frequency is the
same as its clock frequency ) If a signal with a frequency
greater than one-half the sampling frequency is applied to
the input of a sampled data system it will be ‘‘reflected’’ to
a frequency less than one-half the sampling frequency
Thus an input signal whose frequency is f
cause the system to respond as though the input frequency
CLK
f
O
OS(BP)
significantly higher than the nominal value espe-
O
and Q When operating in Mode 3 offsets can
in modes 1a and 3 for example)
OS1
a
1V Where necessary the offset voltage
which will have varying effects on the
FIGURE 21 The Sampled-Data Output Waveform
CLK
s
2
f
O
a
e
(Continued)
100 Hz will
250 with
17
was f
ing’’ and can be reduced or eliminated by limiting the input
signal spectrum to less than f
require the use of a bandwidth-limiting filter ahead of the
MF10 to limit the input spectrum However since the clock
frequency is much higher than the center frequency this will
often not be necessary
Another characteristic of sampled-data circuits is that the
output signal changes amplitude once every sampling peri-
od resulting in ‘‘steps’’ in the output voltage which occur at
the clock rate (Figure 21) If necessary these can be
‘‘smoothed’’ with a simple R – C low-pass filter at the MF10
output
The ratio of f
also affect performance A ratio of 100 1 will reduce any
aliasing problems and is usually recommended for wide-
band input signals In noise sensitive applications however
a ratio of 50 1 may be better as it will result in 3 dB lower
output noise The 50 1 ratio also results in lower DC offset
voltages as discussed in Section 3 4
The accuracy of the f
of Q This is illustrated in the curves under the heading
‘‘Typical Performance Characteristics’’ As Q is changed
the true value of the ratio changes as well Unless the Q is
low the error in f
for a specific application use a mode that allows adjustment
of the ratio with external resistors
It should also be noted that the product of Q and f
be limited to 300 kHz when f
f
O l
s
5 kHz
2
b
100 Hz This phenomenon is known as ‘‘alias-
CLK
CLK
to f
CLK
f
C
O
(normally either 50 1 or 100 1) will
will be small If the error is too large
TL H 10399 – 32
f
O
ratio is dependent on the value
O k
s
2 This may in some cases
5 kHz and to 200 kHz for
O
should