MIC1232MY Micrel Inc, MIC1232MY Datasheet - Page 2

• Manufacturer Part Number: MIC1232MY
• Description: IC,Power Supply Supervisor,SOP,8PIN,PLASTIC
• Manufacturer: Micrel Inc
• Type: Simple Reset/Power-On Resetr

Specifications of MIC1232MY

• Number Of Voltages Monitored: 1
• Output: Open Drain or Open Collector
• Reset: Active Low
• Reset Timeout: 250 ms Minimum
• Voltage - Threshold: 4.37V, 4.62V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 8-SOIC (3.9mm Width)
• Number Of Elements: 1
• Monitored Voltage 1 (typ): 4.5 to 5.5V
• Watchdog Timer: Yes
• Chip Enable Signals: No
• Reset Active Time: 1s
• Package Type: SOIC
• Operating Supply Voltage (min): 4.5V
• Operating Supply Voltage (max): 5.5V
• Reset Threshold Voltage (max): 4.74V
• Reset Threshold Voltage (min): 4.5V
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Power Fail Detection: No
• Mounting: Surface Mount
• Pin Count: 8
• Battery Backup Switching: No
• Manual Reset: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Pin Configuration
Pin Description
MIC1232
MIC1232
Pin Number
1
2
3
4
5
6
7
8
Pin Name
/PBRST
GND
/RST
VCC
RST
TOL
/ST
TD
PBRST
GND
TOL
8-Pin SOIC Package
8-Pin PDIP Package
Pin Function
Pushbutton Reset Input: This input is debounced and can be driven with ex-
ternal logic signals or by means of a mechanical pushbutton to actively force
a reset. All pulses less than 1ms in duration on the /PBRST pin are ignored,
whereas, any pulse with a duration of 20ms or greater is guaranteed to
cause a reset.
Time Delay input: This input selects the timebase used by the watchdog
timer. When TD = 0V, the watchdog timeout period is set to a normal value
of 150ms, when TD = open, the watchdog timeout period is et to a nominal
value of 600ms and when TD = V
Tolerance Select Input: Selects whether 5% or 10% of VCC is used as the
reset threshold voltage. When TOL = 0V, the 5% tolerance level is selected
and when TOL = V
IC ground pin, 0V reference
RST is asserted high if either V
dog times out or /PBRST is pulled low for a minimum of 20ms. RST remains
asserted for one reset timeout period after VCC exceeds the reset threshold
or after the watch times out or after /PBRST goes high.
/RST is asserted low if either V
dog times out or /PBRST is pulled low for a minimum of 20ms. /RST remains
asserted for one reset timeout period after V
or after the watch times out or after /PBRST goes high. Open-drain output
Input to watchdog timer. If /ST does not see a transition from high to low
within the watchdog timeout period, RST and /RST will be asserted.
Primary supply input, +5V
TD
1
2
3
4
MIC1232
2
8
7
6
5
CC
V
ST
RST
RST
, a 10% tolerance level is selected.
CC
CC
CC
CC
goes below the reset threshold, the watch-
goes below the reset threshold, the watch-
, the watchdog period is 1.2s nominally.
CC
exceeds the reset threshold
January 2006
Micrel, Inc.