PIC10F206T-E/OT Microchip Technology, PIC10F206T-E/OT Datasheet - Page 4

IC,MICROCONTROLLER,8-BIT,PIC CPU,CMOS,TSOP,6PIN,PLASTIC

PIC10F206T-E/OT

Manufacturer Part Number
PIC10F206T-E/OT
Description
IC,MICROCONTROLLER,8-BIT,PIC CPU,CMOS,TSOP,6PIN,PLASTIC
Manufacturer
Microchip Technology
Series
PIC® 10Fr

Specifications of PIC10F206T-E/OT

Rohs Compliant
YES
Core Processor
PIC
Core Size
8-Bit
Speed
4MHz
Peripherals
POR, WDT
Number Of I /o
3
Program Memory Size
768B (512 x 12)
Program Memory Type
FLASH
Ram Size
24 x 8
Voltage - Supply (vcc/vdd)
2 V ~ 5.5 V
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
SOT-23-6
Processor Series
PIC10F
Core
PIC
Data Bus Width
8 bit
Data Ram Size
24 B
Interface Type
USB
Maximum Clock Frequency
4 MHz
Number Of Programmable I/os
4
Number Of Timers
1
Operating Supply Voltage
2 V to 5.5 V
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52715-96, 52716-328, 52717-734
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120
Minimum Operating Temperature
- 40 C
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
For Use With
AC162059 - HEADER INTRFC MPLAB ICD2 8/14PINXLT06SOT - SOCKET TRAN ICE 6SOT W/CABLEAC163020 - ADAPTER PROGRAMMER PIC10F2XXAC164321 - MODULE SKT 6L PM3 SOT23AC164037 - MODULE SKT 6L PROMATE II SOT23
Eeprom Size
-
Data Converters
-
Connectivity
-
Lead Free Status / Rohs Status
 Details
PIC10F200/202/204/206
3.1.2.1
After receiving this command, the chip will load in a
14-bit “data word” when 16 cycles are applied, as
described previously. Because this is a 12-bit core, the
two MSbs of the data word are ignored. A timing
diagram for the Load Data command is shown in
Figure 3-2.
FIGURE 3-2:
3.1.2.2
After receiving this command, the chip will transmit
data bits out of the program memory (user or
configuration) currently addressed, starting with the
second rising edge of the clock input. The data pin will
go into Output mode on the second rising clock edge,
and it will revert to Input mode (high-impedance) after
the 16th rising edge. Because this is a 12-bit core, the
two MSbs of the 14-bit word will be read as ‘0’s.
If the program memory is code-protected (CP = 0),
portions of the program memory will be read as zeros.
See Section 5.0 “Code Protection” for details.
FIGURE 3-3:
DS41228E-page 4
ICSPCLK
ICSPDAT
ICSPCLK
ICSPDAT
Load Data For Program Memory
Read Data From Program Memory
1
LOAD DATA COMMAND (PROGRAM/VERIFY)
READ DATA FROM PROGRAM MEMORY COMMAND
0
0
1
T
SET
2
0
1
2
1
1
T
3
SET
T
3
0
HLD
Input
1
T
1
HLD
0
4
4
0
1
x
5
5
x
Preliminary
T
X
6
6
DLY
x
T
T
1
DLY
T
DLY
DLY
2
2
1
1
strt_bit
1
strt_bit
2
2
LSb
LSb
T
3
T
SET
DLY
3
-+T
1
3
HLD
13
MSb
1
13
Output
© 2007 Microchip Technology Inc.
MSb
14
X
14
15
X
15
16
stp_bit
16
stp_bit
Input

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