PIC12LC671-04I/MF Microchip Technology, PIC12LC671-04I/MF Datasheet - Page 74

• Manufacturer Part Number: PIC12LC671-04I/MF
• Description: 8 PIN, 1.75KB OTP, 128 RAM, 6 I/O,
• Manufacturer: Microchip Technology
• Series: PIC® 12Cr

Specifications of PIC12LC671-04I/MF

• Rohs Compliant: YES
• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 4MHz
• Peripherals: POR, WDT
• Number Of I /o: 5
• Program Memory Size: 1.75KB (1K x 14)
• Program Memory Type: OTP
• Ram Size: 128 x 8
• Voltage - Supply (vcc/vdd): 2.5 V ~ 5.5 V
• Data Converters: A/D 4x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 8-DFN
• Processor Series: PIC12LC
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 128 B
• Maximum Clock Frequency: 4 MHz
• Number Of Programmable I/os: 5
• Number Of Timers: 8
• Operating Supply Voltage: 2.5 V to 5.5 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734
• Development Tools By Supplier: ICE2000
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 8
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Connectivity: -
• Lead Free Status / Rohs Status: Details
• Other names: PIC12LC67104I/MF

PIC12C67X
BTFSS
Syntax:
Operands:
Operation:
Status Affected:
Encoding:
Description:
Words:
Cycles:
Example
CALL
Syntax:
Operands:
Operation:
Status Affected:
Encoding:
Description:
Words:
Cycles:
Example
DS30561B-page 74
Bit Test f, Skip if Set
[ label ] BTFSS f,b
0
0
skip if (f<b>) = 1
None
If bit ’b’ in register ’f’ is ’1’, then the
next instruction is skipped.
If bit ’b’ is ’1’, then the next instruc-
tion fetched during the current
instruction execution, is discarded
and a NOP is executed instead,
making this a 2 cycle instruction.
1
1(2)
Before Instruction
After Instruction
Call Subroutine
[ label ] CALL k
0
(PC)+ 1
k
(PCLATH<4:3>)
None
Call Subroutine. First, return
address (PC+1) is pushed onto
the stack. The eleven bit immedi-
ate address is loaded into PC bits
<10:0>. The upper bits of the PC
are loaded from PCLATH. CALL is
a two cycle instruction.
1
2
Before Instruction
After Instruction
HERE
FALSE
TRUE
HERE
01
10
f
b < 7
k
PC<10:0>,
127
2047
PC =
if FLAG<1> = 0,
PC =
if FLAG<1> = 1,
PC =
PC = Address HERE
PC = Address THERE
TOS = Address HERE+1
TOS,
11bb
BTFSS
GOTO
•
•
•
0kkk
CALL
THER
E
address HERE
address FALSE
address TRUE
FLAG,1
PROCESS_CO
DE
kkkk
PC<12:11>
bfff
kkkk
ffff
CLRF
Syntax:
Operands:
Operation:
Status Affected:
Encoding:
Description:
Words:
Cycles:
Example
CLRW
Syntax:
Operands:
Operation:
Status Affected:
Encoding:
Description:
Words:
Cycles:
Example
Clear f
[ label ] CLRF
0
00h
1
Z
The contents of register ’f’ are
cleared and the Z bit is set.
1
1
Before Instruction
After Instruction
Clear W
[ label ] CLRW
None
00h
1
Z
W register is cleared. Zero bit (Z)
is set.
1
1
Before Instruction
After Instruction
CLRF
CLRW
00
00
f
Z
Z
1999 Microchip Technology Inc.
127
(f)
(W)
FLAG_REG
FLAG_REG
Z
W
W
Z
0001
0001
FLAG_REG
=
=
=
f
0x5A
0x00
1
1fff
0000
=
=
=
0x5A
0x00
1
ffff
0011