PIC16C62B-04/SS Microchip Technology, PIC16C62B-04/SS Datasheet - Page 70
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PIC16C62B-04/SS
Manufacturer Part Number
PIC16C62B-04/SS
Description
IC,MICROCONTROLLER,8-BIT,PIC CPU,CMOS,SSOP,28PIN,PLASTIC
Manufacturer
Microchip Technology
Series
PIC® 16Cr
Datasheets
1.PIC16F818-ISO.pdf
(6 pages)
2.PIC16C62B-04SO.pdf
(120 pages)
3.PIC16C62B-04SO.pdf
(5 pages)
Specifications of PIC16C62B-04/SS
Rohs Compliant
YES
Core Processor
PIC
Core Size
8-Bit
Speed
4MHz
Connectivity
I²C, SPI
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
22
Program Memory Size
3.5KB (2K x 14)
Program Memory Type
OTP
Ram Size
128 x 8
Voltage - Supply (vcc/vdd)
4 V ~ 5.5 V
Oscillator Type
External
Operating Temperature
0°C ~ 70°C
Package / Case
28-SSOP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
AC164307 - MODULE SKT FOR PM3 28SSOP309-1025 - ADAPTER 28-SSOP TO 28-DIPXLT28SS-1 - SOCKET TRANSITION ICE 28SSOP
Eeprom Size
-
Data Converters
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
PIC16C62B-04/SS
Manufacturer:
MIC
Quantity:
240
Part Number:
PIC16C62B-04/SS
Manufacturer:
MICR
Quantity:
20 000
PIC16C62B/72A
BTFSS
Syntax:
Operands:
Operation:
Status Affected:
Description:
BTFSC
Syntax:
Operands:
Operation:
Status Affected:
Description:
CALL
Syntax:
Operands:
Operation:
Status Affected:
Description:
DS35008B-page 70
Bit Test f, Skip if Set
[ label ] BTFSS f,b
0
0
skip if (f<b>) = 1
None
If bit ’b’ in register ’f’ is ’0’, then the next
instruction is executed.
If bit ’b’ is ’1’, then the next instruction
is discarded and a NOP is executed
instead, making this a 2T
tion.
Bit Test, Skip if Clear
[ label ] BTFSC f,b
0
0
skip if (f<b>) = 0
None
If bit ’b’ in register ’f’ is ’1’, then the next
instruction is executed.
If bit ’b’ in register ’f’ is ’0’, then the next
instruction is discarded, and a NOP is
executed instead, making this a 2T
instruction
Call Subroutine
[ label ] CALL k
0
(PC)+ 1
k
(PCLATH<4:3>)
None
Call Subroutine. First, return address
(PC+1) is pushed onto the stack. The
eleven bit immediate address is loaded
into PC bits <10:0>. The upper bits of
the PC are loaded from PCLATH.
CALL is a two cycle instruction.
f
b < 7
f
b
k
PC<10:0>,
127
127
7
2047
.
TOS,
PC<12:11>
CY
instruc-
CY
Preliminary
CLRF
Syntax:
Operands:
Operation:
Status Affected:
Description:
CLRW
Syntax:
Operands:
Operation:
Status Affected:
Description:
CLRWDT
Syntax:
Operands:
Operation:
Status Affected:
Description:
Clear W
[ label ] CLRW
None
00h
1
Z
W register is cleared. Zero bit (Z) is
set.
Clear Watchdog Timer
[ label ] CLRWDT
None
00h
0
1
1
TO, PD
CLRWDT instruction resets the Watch-
dog Timer. It also resets the prescaler
of the WDT. Status bits TO and PD
are set.
Clear f
[ label ] CLRF
0
00h
1
Z
The contents of register ’f’ are cleared
and the Z bit is set.
f
Z
WDT prescaler,
TO
PD
Z
1999 Microchip Technology Inc.
127
(W)
WDT
(f)
f