PIC16F628AT-E/SS Microchip Technology, PIC16F628AT-E/SS Datasheet - Page 17
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PIC16F628AT-E/SS
Manufacturer Part Number
PIC16F628AT-E/SS
Description
IC,MICROCONTROLLER,8-BIT,PIC CPU,CMOS,SSOP,20PIN,PLASTIC
Manufacturer
Microchip Technology
Series
PIC® 16Fr
Specifications of PIC16F628AT-E/SS
Rohs Compliant
YES
Core Processor
PIC
Core Size
8-Bit
Speed
20MHz
Connectivity
UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
16
Program Memory Size
3.5KB (2K x 14)
Program Memory Type
FLASH
Eeprom Size
128 x 8
Ram Size
224 x 8
Voltage - Supply (vcc/vdd)
3 V ~ 5.5 V
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
20-SSOP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
I3DBF648 - BOARD DAUGHTER ICEPIC3AC162053 - HEADER INTERFACE ICD,ICD2 18DIP
Data Converters
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
3.6
The PIC16F627A/628A/648A has several Configura-
tion bits. These bits can be set (reads ‘0’) or left
unchanged (reads ‘1’), to select various device
configurations.
3.7
The device ID word for the PIC16F627A/628A/648A is
hard coded at 2006h.
REGISTER 3-1:
© 2007 Microchip Technology Inc.
bit 13
Legend:
R = Readable bit
-n = Value at POR
bit 13
bit 12-9
bit 8
bit 7
bit 6
bit 5
bit 3
bit 2
bit 4, 1-0
Note
R/P-1
CP
1:
2:
3:
Configuration Word
Device ID Word
CP: FLASH Program Memory Code Protection bit
(PIC16F648A)
1 = Code protection off
0 = 0000h to 0FFFh code-protected
(PIC16F628A)
1 = Code protection off
0 = 0000h to 07FFh code-protected
(PIC16F627A)
1 = Code protection off
0 = 0000h to 03FFh code-protected
Unimplemented: Read as ‘1’
CPD: Data Code Protection bit
1 = Data memory code protection off
0 = Data memory code-protected
LVP: Low Voltage Programming Enable bit
1 = RB4/PGM pin has PGM function, low-voltage programming enabled
0 = RB4/PGM is digital I/O, HV on MCLR must be used for programming
BOREN: Brown-out Reset Enable bit
1 = BOR enabled
0 = BOR disabled
MCLRE: RA5/MCLR Pin Function Select bit
1 = RA5/MCLR pin function is MCLR
0 = RA5/MCLR pin function is digital I/O, MCLR internally tied to V
PWRTE: Power-up Timer Enable bit
1 = PWRT disabled
0 = PWRT enabled
WDTE: Watchdog Timer Enable bit
1 = WDT enabled
0 = WDT disabled
FOSC<2:0>: Oscillator Selection bits
111 = RC oscillator: CLKOUT function on RA6/OSC2/CLKOUT pin, Resistor & Capacitor on RA7/OSC1/CLKIN
110 = RC oscillator: I/O function on RA6/OSC2/CLKOUT pin, Resistor & Capacitor on RA7/OSC1/CLKIN
101 = INTOSC internal oscillator: CLKOUT function on RA6/OSC2/CLKOUT pin, I/O function on RA7/OSC1/CLKIN
100 = INTOSC internal oscillator: I/O function on RA6/OSC2/CLKOUT pin, I/O function on RA7/OSC1/CLKIN
011 = EXTCLK: I/O function on RA6/OSC2/CLKOUT pin, I/O function on RA7/OSC1/CLKIN
010 = HS oscillator: High speed crystal/resonator on RA6/OSC2/CLKOUT and RA7/OSC1/CLKIN
001 = XT oscillator: Crystal/resonator on RA6/OSC2/CLKOUT and RA7/OSC1/CLKIN
000 = LP oscillator: Low power crystal on RA6/OSC2/CLKOUT and RA7/OSC1/CLKIN
U-1
—
Enabling Brown-out Reset does not automatically enable the Power-up Timer (PWRT).
Only a Bulk Erase will reset the Configuration Word, including the CP bits.
While MCLR is asserted in INTOSC mode, the internal clock oscillator is disabled.
U-1
—
(ADDRESS: 2007h)
CONFIGURATION WORD FOR PIC16F627A/PIC16F628A/PIC16F648A
W = Writable bit
‘1’ = Bit is set
U-1
—
U-1
—
(2)
(1)
(1)
(3)
R/P-1
CPD
U = Unimplemented bit, read as ‘1’
‘0’ = Bit is cleared
R/P-1
LVP
Preliminary
BOREN
R/P-1
PIC16F627A/628A/648A
DD
TABLE 3-2:
MCLRE
PIC16F627A
PIC16F628A
PIC16F648A
R/P-1
Device
FOSC2
R/P-1
DEVICE ID VALUES
PWRTE
R/P-1
01 0000 010
01 0000 011
01 0001 000
Dev
P = Programmable
x = Bit is unknown
Device ID Value
WDTE
R/P-1
DS41196G-page 17
FOSC1
R/P-1
x xxxx
x xxxx
x xxxx
Rev
FOSC0
R/P-1
bit 0