PIC16F630-I/ML Microchip Technology, PIC16F630-I/ML Datasheet - Page 3
![1.75KB Flash, 64 RAM, 12 I/O 16 QFN 4x4mm TUBE](/photos/6/65/66536/mfg_mcp7386x_qfn_sml.jpg)
PIC16F630-I/ML
Manufacturer Part Number
PIC16F630-I/ML
Description
1.75KB Flash, 64 RAM, 12 I/O 16 QFN 4x4mm TUBE
Manufacturer
Microchip Technology
Series
PIC® 16Fr
Datasheets
1.PIC16F616T-ISL.pdf
(8 pages)
2.PIC12F629T-ISN.pdf
(24 pages)
3.PIC16F630-ISL.pdf
(132 pages)
4.PIC16F630-ISL.pdf
(2 pages)
5.PIC16F630-ISL.pdf
(10 pages)
Specifications of PIC16F630-I/ML
Core Processor
PIC
Core Size
8-Bit
Speed
20MHz
Peripherals
Brown-out Detect/Reset, POR, WDT
Number Of I /o
12
Program Memory Size
1.75KB (1K x 14)
Program Memory Type
FLASH
Eeprom Size
128 x 8
Ram Size
64 x 8
Voltage - Supply (vcc/vdd)
2 V ~ 5.5 V
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
16-QFN
Processor Series
PIC16F
Core
PIC
Data Bus Width
8 bit
Data Ram Size
64 B
Interface Type
RS- 232, USB
Maximum Clock Frequency
20 MHz
Number Of Programmable I/os
12
Number Of Timers
2
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52715-96, 52716-328, 52717-734
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120, ICE2000, DM163014, DM164120-4
Minimum Operating Temperature
- 40 C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
AC164324 - MODULE SKT FOR MPLAB 8DFN/16QFN
Data Converters
-
Connectivity
-
Lead Free Status / Rohs Status
Details
2. Module: TRISA – PORTA Tri-state
REGISTER 3-2:
3. Module: ANSEL – Analog Select Register
© 2007 Microchip Technology Inc.
Note:
Note:
Note:
Note:
Note:
Register 3-2: Correction to replace R/W-x with
R/W-1 as shown in bold.
The ANSEL register address is 91h. Change all
ANSEL register addresses called out as 9Fh to
91h in the following sections, as shown in bold:
In Section 3.1, PORTA and the TRISA Registers,
in the note box:
In Section 3.3, PORTC, in the note box:
In Section 4.3, Using Timer0 with an External
Clock, in the note box:
In Section 5.4, Timer1 Operation in Asynchronous
Counter Mode, in the note box:
In Section 9.4.1, RA2/INT Interrupt, in the note
box:
bit 7-6:
bit 5-0:
The ANSEL (91h) and CMCON (19h).....
The ANSEL register (91h) must be.....
The ANSEL (91h) and CMCON (19h).....
The ANSEL (91h) and CMCON (19h).....
The ANSEL (91h) and CMCON (19h).....
Register
TRISA – PORTA TRI-STATE REGISTER (ADDRESS: 85h)
bit 7
Unimplemented: Read as ‘0’
TRISA<5:0>: PORTA Tri-State Control bit
1 = PORTA pin configured as an input (tri-stated)
0 = PORTA pin configured as an output
Legend:
R = Readable bit
-n = Value at POR
Note:
U-0
—
TRISA<3> always reads 1.
U-0
—
TRISA5
R/W-1
W = Writable bit
‘1’ = Bit is set
TRISA4
R/W-1
TRISA3
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
R-1
PIC16F630/676
TRISA2
R/W-1
x = Bit is unknown
TRISA1
R/W-1
DS80185F-page 3
TRISA0
R/W-1
bit 0