PIC16F630-I/ML Microchip Technology, PIC16F630-I/ML Datasheet - Page 19
![1.75KB Flash, 64 RAM, 12 I/O 16 QFN 4x4mm TUBE](/photos/6/65/66536/mfg_mcp7386x_qfn_sml.jpg)
PIC16F630-I/ML
Manufacturer Part Number
PIC16F630-I/ML
Description
1.75KB Flash, 64 RAM, 12 I/O 16 QFN 4x4mm TUBE
Manufacturer
Microchip Technology
Series
PIC® 16Fr
Datasheets
1.PIC16F616T-ISL.pdf
(8 pages)
2.PIC12F629T-ISN.pdf
(24 pages)
3.PIC16F630-ISL.pdf
(132 pages)
4.PIC16F630-ISL.pdf
(2 pages)
5.PIC16F630-ISL.pdf
(10 pages)
Specifications of PIC16F630-I/ML
Core Processor
PIC
Core Size
8-Bit
Speed
20MHz
Peripherals
Brown-out Detect/Reset, POR, WDT
Number Of I /o
12
Program Memory Size
1.75KB (1K x 14)
Program Memory Type
FLASH
Eeprom Size
128 x 8
Ram Size
64 x 8
Voltage - Supply (vcc/vdd)
2 V ~ 5.5 V
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
16-QFN
Processor Series
PIC16F
Core
PIC
Data Bus Width
8 bit
Data Ram Size
64 B
Interface Type
RS- 232, USB
Maximum Clock Frequency
20 MHz
Number Of Programmable I/os
12
Number Of Timers
2
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52715-96, 52716-328, 52717-734
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120, ICE2000, DM163014, DM164120-4
Minimum Operating Temperature
- 40 C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
AC164324 - MODULE SKT FOR MPLAB 8DFN/16QFN
Data Converters
-
Connectivity
-
Lead Free Status / Rohs Status
Details
4.0
For PIC12F629/675/PIC16F630/676 devices, once
code protection is enabled, all program memory loca-
tions, except 0X3FF, reads all ‘0’s. The ID locations and
the Configuration Word read out in an unprotected
fashion. Further programming is disabled for the entire
program memory. Data memory is protected with its
own Code Protection Data bit (CPD). It is possible to
program the ID locations and the Configuration Word.
4.1
It is recommended that the following procedure be
performed before any other programming is attempted.
It is also possible to turn code protection off (CPD = 1)
using this procedure. However, all data within the
program memory and the data memory will be erased
when this procedure is executed and thus, the security
of the data or code is not compromised.
4.2
© 2005 Microchip Technology Inc.
To allow portability of code, the programmer is required to read the Configuration Word and ID locations from the hex
file when loading the hex file. If Configuration Word information was not present in the hex file, then a simple warning
message may be issued. Similarly, while saving a hex file, Configuration Word and ID information must be included.
An option to not include this information may be provided.
Specifically for the PIC12F629/675/PIC16F630/676, the EEPROM data memory should also be embedded in the hex
file (see Section 4.3.2 “Embedding Data EEPROM Contents In Hex File”).
Microchip Technology Incorporated feels strongly that this feature is important for the benefit of the end customer.
CODE PROTECTION
Disabling Code Protection
Embedding Configuration Word and ID Information in the Hex File
PIC12F629/675/PIC16F630/676
To disable code-protect:
a)
b)
c)
d)
e)
f)
g)
h)
Note:
Read and store OSCCAL and BG bits.
Execute Load Configuration (000000).
Execute Bulk Erase Program Memory (001001).
Wait T
Execute Bulk Erase Data Memory (001011).
Wait T
Reset device to reset address counter before
reprogramming device.
Restore OSCCAL and BG bits.
ERA
ERA
To ensure system security, if CPD bit = 0,
step c) will also erase data memory.
.
.
DS41191D-page 19