PIC16F72-E/SP Microchip Technology, PIC16F72-E/SP Datasheet - Page 350
PIC16F72-E/SP
Manufacturer Part Number
PIC16F72-E/SP
Description
28 PIN, 3.5KB STD FLASH, 128 RAM, 22 I/O,
Manufacturer
Microchip Technology
Series
PIC® 16Fr
Datasheets
1.PIC16F616T-ISL.pdf
(8 pages)
2.PIC16F688T-ISL.pdf
(688 pages)
3.PIC16F818-ISO.pdf
(6 pages)
4.PIC16F72-ISO.pdf
(136 pages)
5.PIC16F72-ISO.pdf
(6 pages)
Specifications of PIC16F72-E/SP
Rohs Compliant
YES
Core Processor
PIC
Core Size
8-Bit
Speed
20MHz
Connectivity
I²C, SPI
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
22
Program Memory Size
3.5KB (2K x 14)
Program Memory Type
FLASH
Ram Size
128 x 8
Voltage - Supply (vcc/vdd)
4 V ~ 5.5 V
Data Converters
A/D 5x8b
Oscillator Type
External
Operating Temperature
-40°C ~ 125°C
Package / Case
28-DIP (0.300", 7.62mm)
Processor Series
PIC16F
Core
PIC
Data Bus Width
8 bit
Data Ram Size
128 B
Interface Type
I2C, SPI, SSP
Maximum Clock Frequency
20 MHz
Number Of Programmable I/os
22
Number Of Timers
3
Operating Supply Voltage
2 V to 5.5 V
Maximum Operating Temperature
+ 125 C
Mounting Style
Through Hole
3rd Party Development Tools
52715-96, 52716-328, 52717-734
Development Tools By Supplier
ICE2000, DM163022
Minimum Operating Temperature
- 40 C
On-chip Adc
8 bit, 5 Channel
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Details
- PIC16F616T-ISL PDF datasheet
- PIC16F688T-ISL PDF datasheet #2
- PIC16F818-ISO PDF datasheet #3
- PIC16F72-ISO PDF datasheet #4
- PIC16F72-ISO PDF datasheet #5
- Current page: 350 of 688
- Download datasheet (3Mb)
PICmicro MID-RANGE MCU FAMILY
Figure 18-8:
Figure 18-9:
Table 18-7: Registers Associated with Asynchronous Reception
DS31018A-page 18-14
PIR
RCSTA
RCREG
PIE
TXSTA
SPBRG Baud Rate Generator Register
Legend: x = unknown, - = unimplemented locations read as '0'.
Note 1: The position of this bit is device dependent.
Name
Q2, Q4 clk
Q2, Q4 clk
baud clk
RX pin
RX pin
x4 clk
baud clk
Shaded cells are not used for Asynchronous Reception.
x4 clk
CSRC
SPEN
Bit 7
RX7
RX Pin Sampling Scheme (BRGH = 1)
RX Pin Sampling Scheme (BRGH = 1)
Bit 6
RX9
RX6
TX9
First falling edge after RX pin goes low
SREN
TXEN
Bit 5
RX5
1
Start Bit
Samples
1
First falling edge after RX pin goes low
CREN
SYNC
Bit 4
RX4
2
RCIE
RCIF
Second rising edge
Bit 3
(1)
(1)
RX3
3
—
—
Samples
Start Bit
4
BRGH
2
FERR
Bit 2
RX2
Second rising edge
1
Samples
Baud clk for all but start bit
OERR
TRMT
Bit 1
RX1
bit0
2
RX9D
TX9D
3
Bit 0
RX0
3
1997 Microchip Technology Inc.
4
0000 -00x
0000 0000
0000 -010
0000 0000
Value on:
POR,
BOR
0
0
1
Samples
bit1
4
0000 -00x
0000 0000
0000 -010
0000 0000
2
Value on
all other
Resets
0
0
bit0
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