PIC16F76-E/ML Microchip Technology, PIC16F76-E/ML Datasheet - Page 460
PIC16F76-E/ML
Manufacturer Part Number
PIC16F76-E/ML
Description
14 KB Flash, 368 RAM, 25 I/O 28 QFN 6x6mm TUBE
Manufacturer
Microchip Technology
Series
PIC® 16Fr
Datasheets
1.PIC16F616T-ISL.pdf
(8 pages)
2.PIC16F688T-ISL.pdf
(688 pages)
3.PIC16F818-ISO.pdf
(6 pages)
4.PIC16F73-ISP.pdf
(174 pages)
5.PIC16F73-ISP.pdf
(14 pages)
6.PIC16F73-ISP.pdf
(12 pages)
Specifications of PIC16F76-E/ML
Core Processor
PIC
Core Size
8-Bit
Speed
20MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
22
Program Memory Size
14KB (8K x 14)
Program Memory Type
FLASH
Ram Size
368 x 8
Voltage - Supply (vcc/vdd)
4 V ~ 5.5 V
Data Converters
A/D 5x8b
Oscillator Type
External
Operating Temperature
-40°C ~ 125°C
Package / Case
28-VQFN Exposed Pad, 28-HVQFN, 28-SQFN, 28-DHVQFN
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
- PIC16F616T-ISL PDF datasheet
- PIC16F688T-ISL PDF datasheet #2
- PIC16F818-ISO PDF datasheet #3
- PIC16F73-ISP PDF datasheet #4
- PIC16F73-ISP PDF datasheet #5
- PIC16F73-ISP PDF datasheet #6
- Current page: 460 of 688
- Download datasheet (3Mb)
PICmicro MID-RANGE MCU FAMILY
25.1
DS31025A-page 25-2
Introduction
The LCD module generates the timing control to drive a static or multiplexed LCD panel, with
support for up to 32 segments multiplexed with up to four commons. It also provides control of
the LCD pixel data.
The interface to the module consists of three control registers (LCDCON, LCDSE, and LCDPS)
used to define the timing requirements of the LCD panel and up to 16 LCD data registers
(LCD00-LCD15) that represent the array of the pixel data. In normal operation, the control regis-
ters are configured to match the LCD panel being used. Primarily, the initialization information
consists of selecting the number of commons and segments required by the LCD panel, and then
specifying the LCD Frame clock rate to be used by the panel.
Once the module is initialized for the LCD panel, the individual bits of the LCD data registers are
cleared/set to represent a turned-on pixel respectively.
Once the module is configured, the LCDEN bit (LCDCON<7>) is used to enable or disable the
LCD module. The LCD panel can also operate during sleep by clearing the SLPEN bit
(LCDCON<6>).
Figure 25-1:
Internal RC osc
T1CKI
Fosc/4
Data Bus
LCD Module Block Diagram
Timing Control
LCDCON
LCDPS
LCDSE
32 x 4
Clock
Source
Select
and
Divide
RAM
LCD
COM3:COM0
MUX
128
32
to
SEG<31:0>
TO I/O PADS
1997 Microchip Technology Inc.
TO I/O PADS
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