PIC16F76-E/SP Microchip Technology, PIC16F76-E/SP Datasheet - Page 95
PIC16F76-E/SP
Manufacturer Part Number
PIC16F76-E/SP
Description
28 PIN, 14KB STD FLASH, 368 RAM, 22 I/O,
Manufacturer
Microchip Technology
Series
PIC® 16Fr
Datasheets
1.PIC16F616T-ISL.pdf
(8 pages)
2.PIC16F688T-ISL.pdf
(688 pages)
3.PIC16F818-ISO.pdf
(6 pages)
4.PIC16F73-ISP.pdf
(174 pages)
5.PIC16F73-ISP.pdf
(14 pages)
6.PIC16F73-ISP.pdf
(12 pages)
Specifications of PIC16F76-E/SP
Rohs Compliant
YES
Core Processor
PIC
Core Size
8-Bit
Speed
20MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
22
Program Memory Size
14KB (8K x 14)
Program Memory Type
FLASH
Ram Size
368 x 8
Voltage - Supply (vcc/vdd)
4 V ~ 5.5 V
Data Converters
A/D 5x8b
Oscillator Type
External
Operating Temperature
-40°C ~ 125°C
Package / Case
28-DIP (0.300", 7.62mm)
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
PIC16F76E/SP
- PIC16F616T-ISL PDF datasheet
- PIC16F688T-ISL PDF datasheet #2
- PIC16F818-ISO PDF datasheet #3
- PIC16F73-ISP PDF datasheet #4
- PIC16F73-ISP PDF datasheet #5
- PIC16F73-ISP PDF datasheet #6
- Current page: 95 of 174
- Download datasheet (5Mb)
12.3
The PIC16F7X differentiates between various kinds of
RESET:
• Power-on Reset (POR)
• MCLR Reset during normal operation
• MCLR Reset during SLEEP
• WDT Reset (during normal operation)
• WDT Wake-up (during SLEEP)
• Brown-out Reset (BOR)
FIGURE 12-4:
2002 Microchip Technology Inc.
MCLR
OSC1
V
Note 1:
DD
RESET
RC OSC
On-chip
This is a separate oscillator from the RC oscillator of the CLKIN pin.
OST/PWRT
Brown-out
V
(1)
Module
Detect
DD
WDT
Reset
Rise
SIMPLIFIED BLOCK DIAGRAM OF ON-CHIP RESET CIRCUIT
OST
PWRT
10-bit Ripple Counter
Time-out
Reset
WDT
10-bit Ripple Counter
BODEN
Power-on Reset
External
RESET
SLEEP
Some registers are not affected in any RESET condi-
tion. Their status is unknown on POR and unchanged
in any other RESET. Most other registers are reset to a
“RESET state” on Power-on Reset (POR), on the
MCLR and WDT Reset, on MCLR Reset during
SLEEP, and Brown-out Reset (BOR). They are not
affected by a WDT Wake-up, which is viewed as the
resumption of normal operation. The TO and PD bits
are set or cleared differently in different RESET situa-
tions, as indicated in Table 12-4. These bits are used in
software to determine the nature of the RESET. See
Table 12-6 for a full description of RESET states of all
registers.
A simplified block diagram of the on-chip RESET circuit
is shown in Figure 12-4.
S
R
PIC16F7X
DS30325B-page 93
Q
Chip_Reset
Enable PWRT
Enable OST
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