PIC16F819-E/SO Microchip Technology, PIC16F819-E/SO Datasheet - Page 146

IC,MICROCONTROLLER,8-BIT,PIC CPU,CMOS,SOP,18PIN,PLASTIC

PIC16F819-E/SO

Manufacturer Part Number
PIC16F819-E/SO
Description
IC,MICROCONTROLLER,8-BIT,PIC CPU,CMOS,SOP,18PIN,PLASTIC
Manufacturer
Microchip Technology
Series
PIC® 16Fr

Specifications of PIC16F819-E/SO

Rohs Compliant
YES
Core Processor
PIC
Core Size
8-Bit
Speed
20MHz
Connectivity
I²C, SPI
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
16
Program Memory Size
3.5KB (2K x 14)
Program Memory Type
FLASH
Eeprom Size
256 x 8
Ram Size
256 x 8
Voltage - Supply (vcc/vdd)
4 V ~ 5.5 V
Data Converters
A/D 5x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
18-SOIC (7.5mm Width)
Processor Series
PIC16F
Core
PIC
Data Bus Width
8 bit
Data Ram Size
256 B
Interface Type
I2C, SPI, SSP
Maximum Clock Frequency
20 MHz
Number Of Programmable I/os
16
Number Of Timers
1 x 16 bit
Operating Supply Voltage
2 V to 5.5 V
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52715-96, 52716-328, 52717-734
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120, ICE2000, DM163014
Minimum Operating Temperature
- 40 C
On-chip Adc
5 bit
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
PIC16F819-E/SO
Manufacturer:
ZETTLER
Quantity:
201
PICmicro MID-RANGE MCU FAMILY
9.3
DS31009A-page 9-6
PORTB and the TRISB Register
PORTB is an 8-bit wide bi-directional port. The corresponding data direction register is TRISB.
Setting a bit in the TRISB register puts the corresponding output driver in a high-impedance input
mode. Clearing a bit in the TRISB register puts the contents of the output latch on the selected
pin(s).
Example 9-2:
Each of the PORTB pins has a weak internal pull-up. A single control bit can turn on all the
pull-ups. This is performed by clearing bit RBPU (OPTION<7>). The weak pull-up is automati-
cally turned off when the port pin is configured as an output. The pull-ups are disabled on a
Power-on Reset.
Figure 9-4: Block Diagram of RB3:RB0 Pins
CLRF
CLRF
BSF
MOVLW
MOVWF
Note 1: I/O pins have diode protection to V
STATUS
PORTB
STATUS, RP0
0xCF
TRISB
Initializing PORTB
2: To enable weak pull-ups, set the appropriate TRIS bit(s) and clear
the RBPU bit (OPTION<7>).
Data bus
WR TRIS
WR Port
To Peripheral Module
RBPU
(2)
; Bank0
; Initialize PORTB by clearing output
;
; Select Bank1
; Value used to initialize data direction
; PORTB<3:0> = inputs, PORTB<5:4> = outputs
;
data latches
PORTB<7:6> = inputs
RD TRIS
RD Port
TRIS Latch
Data Latch
D
D
CK
CK
Schmitt Trigger
Buffer
DD
Q
Q
and V
SS
.
Q
1997 Microchip Technology Inc.
EN
TTL
Input
Buffer
D
V
P
RD Port
DD
weak
pull-up
I/O
pin
(1)

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