PIC16F876A-E/SS Microchip Technology, PIC16F876A-E/SS Datasheet - Page 320
PIC16F876A-E/SS
Manufacturer Part Number
PIC16F876A-E/SS
Description
28 PIN, 14KB ENH FLASH, 368 RAM, 22 I/O,
Manufacturer
Microchip Technology
Series
PIC® 16Fr
Datasheets
1.PIC16F616T-ISL.pdf
(8 pages)
2.PIC16F688T-ISL.pdf
(688 pages)
3.PIC16C770-ISO.pdf
(8 pages)
4.PIC16F873A-ISO.pdf
(234 pages)
5.PIC16F873A-ISO.pdf
(6 pages)
6.PIC16F873A-ISO.pdf
(4 pages)
7.PIC16F873A-ISO.pdf
(6 pages)
8.PIC16F873A-ISO.pdf
(4 pages)
9.PIC16F873A-ISO.pdf
(22 pages)
Specifications of PIC16F876A-E/SS
Rohs Compliant
YES
Core Processor
PIC
Core Size
8-Bit
Speed
20MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
22
Program Memory Size
14KB (8K x 14)
Program Memory Type
FLASH
Eeprom Size
256 x 8
Ram Size
368 x 8
Voltage - Supply (vcc/vdd)
4 V ~ 5.5 V
Data Converters
A/D 5x10b
Oscillator Type
External
Operating Temperature
-40°C ~ 125°C
Package / Case
28-SSOP
Processor Series
PIC16F
Core
PIC
Data Bus Width
8 bit
Data Ram Size
368 B
Interface Type
I2C, SPI, USART
Maximum Clock Frequency
20 MHz
Number Of Programmable I/os
22
Number Of Timers
1 x 16 bit
Operating Supply Voltage
2 V to 5.5 V
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52715-96, 52716-328, 52717-734
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120, ICE2000, DM163022, DV164120
Minimum Operating Temperature
- 40 C
On-chip Adc
5 bit
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
- PIC16F616T-ISL PDF datasheet
- PIC16F688T-ISL PDF datasheet #2
- PIC16C770-ISO PDF datasheet #3
- PIC16F873A-ISO PDF datasheet #4
- PIC16F873A-ISO PDF datasheet #5
- PIC16F873A-ISO PDF datasheet #6
- PIC16F873A-ISO PDF datasheet #7
- PIC16F873A-ISO PDF datasheet #8
- PIC16F873A-ISO PDF datasheet #9
- Current page: 320 of 688
- Download datasheet (3Mb)
PICmicro MID-RANGE MCU FAMILY
17.4.13
17.4.13.1 WCOL Status Flag
DS31017A-page 17-44
Acknowledge Sequence Timing
An acknowledge sequence is enabled by setting the acknowledge sequence enable bit, ACKEN
(SSPCON2<4>). When this bit is set, the SCL pin is pulled low and the contents of the acknowl-
edge data bit is presented on the SDA pin. If the user wishes to generate an acknowledge, then
the ACKDT bit should be cleared. If not, the user should set the ACKDT bit before starting an
acknowledge sequence. The baud rate generator then counts for one rollover period (T
the SCL pin is de-asserted (pulled high). When the SCL pin is sampled high (clock arbitration),
the baud rate generator counts for T
ACKEN bit is automatically cleared, the baud rate generator is turned off, and the SSP module
then goes into IDLE mode
If the user writes the SSPBUF when an acknowledge sequence is in progress, then WCOL is set
and the contents of the buffer are unchanged (the write doesn’t occur).
Figure 17-29: Acknowledge Sequence Waveform
SSPIF
Acknowledge sequence starts here,
SDA
SCL
Note: T
Set SSPIF at the end
of receive
BRG
= one baud rate generator period.
ACKEN = 1, ACKDT = 0
Write to SSPCON2
(Figure
Preliminary
8
D0
17-29).
BRG
. The SCL pin is then pulled low. Following this, the
Cleared in
software
T
BRG
ACK
T
BRG
9
Set SSPIF at the end
of acknowledge sequence
ACKEN automatically cleared
1997 Microchip Technology Inc.
Cleared in
software
BRG
), and
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