PIC16F913T-I/SS Microchip Technology, PIC16F913T-I/SS Datasheet - Page 87

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PIC16F913T-I/SS

Manufacturer Part Number
PIC16F913T-I/SS
Description
IC,MICROCONTROLLER,8-BIT,PIC CPU,CMOS,SSOP,28PIN,PLASTIC
Manufacturer
Microchip Technology
Series
PIC® 16Fr

Specifications of PIC16F913T-I/SS

Rohs Compliant
YES
Core Processor
PIC
Core Size
8-Bit
Speed
20MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, LCD, POR, PWM, WDT
Number Of I /o
24
Program Memory Size
7KB (4K x 14)
Program Memory Type
FLASH
Eeprom Size
256 x 8
Ram Size
256 x 8
Voltage - Supply (vcc/vdd)
2 V ~ 5.5 V
Data Converters
A/D 5x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
28-SSOP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
3.9.1
Each PORTG pin is multiplexed with other functions. The
pins and their combined functions are briefly described
here. For specific information about individual functions,
refer to the appropriate section in this data sheet.
3.9.1.1
Figure 3-30 shows the diagram for this pin. The RG0
pin is configurable to function as one of the following:
• a general purpose I/O
• an analog output for the LCD
3.9.1.2
Figure 3-30 shows the diagram for this pin. The RG1
pin is configurable to function as one of the following:
• a general purpose I/O
• an analog output for the LCD
3.9.1.3
Figure 3-30 shows the diagram for this pin. The RG2
pin is configurable to function as one of the following:
• a general purpose I/O
• an analog output for the LCD
FIGURE 3-30:
© 2007 Microchip Technology Inc.
WR PORTG
WR TRISG
Data Bus
SEG<41:36>
PIN DESCRIPTIONS AND
DIAGRAMS
RG0/SEG36
RG1/SEG37
RG2/SEG38
BLOCK DIAGRAM OF RG<5:0>
TRIS Latch
Data Latch
RD PORTG
D
D
CK
CK
RD TRISG
Q
Q
Q
Q
SE<41:36> and LCDEN
SE<41:36> and LCDEN
PIC16F913/914/916/917/946
3.9.1.4
Figure 3-30 shows the diagram for this pin. The RG3
pin is configurable to function as one of the following:
• a general purpose I/O
• an analog output for the LCD
3.9.1.5
Figure 3-30 shows the diagram for this pin. The RG4
pin is configurable to function as one of the following:
• a general purpose I/O
• an analog output for the LCD
3.9.1.6
Figure 3-30 shows the diagram for this pin. The RG5
pin is configurable to function as one of the following:
• a general purpose I/O
• an analog output for the LCD
Schmitt
Trigger
RG3/SEG39
RG4/SEG40
RG5/SEG41
V
V
DD
SS
DS41250F-page 85
I/O Pin

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