PIC16HV616T-I/ST Microchip Technology, PIC16HV616T-I/ST Datasheet - Page 131
PIC16HV616T-I/ST
Manufacturer Part Number
PIC16HV616T-I/ST
Description
1.75KB Flash, 64B RAM, 6 I/O, 8MHz Internal Oscillator 14 TSSOP 4.4mm T/R
Manufacturer
Microchip Technology
Series
PIC® 16Fr
Datasheets
1.PIC12F609T-ISN.pdf
(26 pages)
2.PIC16F616T-ISL.pdf
(214 pages)
3.PIC16F616T-ISL.pdf
(8 pages)
4.PIC16HV616-ISL.pdf
(26 pages)
Specifications of PIC16HV616T-I/ST
Core Processor
PIC
Core Size
8-Bit
Speed
20MHz
Peripherals
Brown-out Detect/Reset, POR, WDT
Number Of I /o
11
Program Memory Size
3.5KB (2K x 14)
Program Memory Type
FLASH
Ram Size
128 x 8
Voltage - Supply (vcc/vdd)
2 V ~ 5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
14-TSSOP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
AC162083 - HEADER MPLAB ICD2 PIC16F616 8/14XLT14SS-1 - SOCKET TRANSITION 14DIP/14SSOPAC164306 - MODULE SKT FOR PM3 20TSSOP
Eeprom Size
-
Connectivity
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
- PIC12F609T-ISN PDF datasheet
- PIC16F616T-ISL PDF datasheet #2
- PIC16F616T-ISL PDF datasheet #3
- PIC16HV616-ISL PDF datasheet #4
- Current page: 131 of 214
- Download datasheet (4Mb)
13.2
ADDLW
Syntax:
Operands:
Operation:
Status Affected:
Description:
ADDWF
Syntax:
Operands:
Operation:
Status Affected:
Description:
ANDLW
Syntax:
Operands:
Operation:
Status Affected:
Description:
ANDWF
Syntax:
Operands:
Operation:
Status Affected:
Description:
© 2009 Microchip Technology Inc.
Instruction Descriptions
Add W and f
[ label ] ADDWF
0 ≤ f ≤ 127
d ∈ [0,1]
(W) + (f) → (destination)
C, DC, Z
Add the contents of the W register
with register ‘f’. If ‘d’ is ‘0’, the
result is stored in the W register. If
‘d’ is ‘1’, the result is stored back
in register ‘f’.
AND W with f
[ label ] ANDWF
0 ≤ f ≤ 127
d ∈ [0,1]
(W) .AND. (f) → (destination)
Z
AND the W register with register
‘f’. If ‘d’ is ‘0’, the result is stored in
the W register. If ‘d’ is ‘1’, the
result is stored back in register ‘f’.
[ label ] ADDLW
0 ≤ k ≤ 255
(W) + k → (W)
C, DC, Z
The contents of the W register
are added to the eight-bit literal ‘k’
and the result is placed in the
W register.
[ label ] ANDLW
0 ≤ k ≤ 255
(W) .AND. (k) → (W)
Z
The contents of W register are
AND’ed with the eight-bit literal
‘k’. The result is placed in the W
register.
Add literal and W
AND literal with W
f,d
f,d
k
k
PIC16F610/616/16HV610/616
BCF
Syntax:
Operands:
Operation:
Status Affected:
Description:
BSF
Syntax:
Operands:
Operation:
Status Affected:
Description:
BTFSC
Syntax:
Operands:
Operation:
Status Affected:
Description:
Bit Test f, Skip if Clear
[ label ] BTFSC f,b
0 ≤ f ≤ 127
0 ≤ b ≤ 7
skip if (f<b>) = 0
None
If bit ‘b’ in register ‘f’ is ‘1’, the next
instruction is executed.
If bit ‘b’ in register ‘f’ is ‘0’, the next
instruction is discarded, and a NOP
is executed instead, making this a
two-cycle instruction.
Bit Clear f
[ label ] BCF
0 ≤ f ≤ 127
0 ≤ b ≤ 7
0 → (f<b>)
None
Bit ‘b’ in register ‘f’ is cleared.
Bit Set f
[ label ] BSF
0 ≤ f ≤ 127
0 ≤ b ≤ 7
1 → (f<b>)
None
Bit ‘b’ in register ‘f’ is set.
f,b
f,b
DS41288F-page 131
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