PIC16LC64A-04/L Microchip Technology, PIC16LC64A-04/L Datasheet - Page 96

• Manufacturer Part Number: PIC16LC64A-04/L
• Description: IC,MICROCONTROLLER,8-BIT,PIC CPU,CMOS,LDCC,44PIN,PLASTIC
• Manufacturer: Microchip Technology
• Series: PIC® 16Cr

Specifications of PIC16LC64A-04/L

• Rohs Compliant: YES
• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 4MHz
• Connectivity: I²C, SPI
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 33
• Program Memory Size: 3.5KB (2K x 14)
• Program Memory Type: OTP
• Ram Size: 128 x 8
• Voltage - Supply (vcc/vdd): 2.5 V ~ 6 V
• Oscillator Type: External
• Operating Temperature: 0°C ~ 70°C
• Package / Case: 44-PLCC
• Package: 44PLCC
• Device Core: PIC
• Family Name: PIC16
• Maximum Speed: 4 MHz
• Operating Supply Voltage: 3.3|5 V
• Data Bus Width: 8 Bit
• Number Of Programmable I/os: 33
• Interface Type: I2C/SPI/USART
• Number Of Timers: 3
• Processor Series: PIC16LC
• Core: PIC
• Data Ram Size: 128 B
• Maximum Clock Frequency: 4 MHz
• Maximum Operating Temperature: + 70 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734
• Development Tools By Supplier: ICE2000, DM163022
• Minimum Operating Temperature: 0 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Data Converters: -
• Lead Free Status / Rohs Status: Details

PIC16C63A/65B/73B/74B
13.7.2
It should also be taken into account that under worst
case conditions (V
max. WDT prescaler), it may take several seconds
before a WDT time-out occurs.
FIGURE 13-6:
TABLE 13-7:
DS30605C-page 96
2007h
81h
Legend: Shaded cells are not used by the Watchdog Timer.
Note 1: See Register 13-1 for operation of these bits.
Address
Note:
Note: PSA and PS2:PS0 are bits in the OPTION register.
When a CLRWDT instruction is executed
and the prescaler is assigned to the WDT,
the prescaler count will be cleared, but the
prescaler assignment is not changed.
WDT PROGRAMMING
CONSIDERATIONS
Config. bits
OPTION_REG
Name
SUMMARY OF WATCHDOG TIMER REGISTERS
DD
= Min., Temperature = Max., and
WATCHDOG TIMER BLOCK DIAGRAM
WDT Timer
Enable Bit
WDT
RBPU
Bit 7
From TMR0 Clock Source
(Figure 6-1)
–
BODEN
INTEDG
Bit 6
0
1
(1)
PSA
M
U
X
T0CS
Bit 5
CP1
T0SE
Bit 4
CP0
0
Time-out
8 - to - 1 MUX
MUX
WDT
Postscaler
PWRTE
1
Bit 3
PSA
8
(1)
PSA
To TMR0 MUX (Figure 6-1)
WDTE
Bit 2
PS2
2000 Microchip Technology Inc.
PS2:PS0
FOSC1
Bit 1
PS1
FOSC0
Bit 0
PS0