PIC16LF628A-I/ML Microchip Technology, PIC16LF628A-I/ML Datasheet - Page 94

• Manufacturer Part Number: PIC16LF628A-I/ML
• Description: IC,MICROCONTROLLER,8-BIT,PIC CPU,CMOS,LLCC,28PIN,PLASTIC
• Manufacturer: Microchip Technology
• Series: PIC® 16Fr

Specifications of PIC16LF628A-I/ML

• Rohs Compliant: YES
• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 20MHz
• Connectivity: UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 16
• Program Memory Size: 3.5KB (2K x 14)
• Program Memory Type: FLASH
• Eeprom Size: 128 x 8
• Ram Size: 224 x 8
• Voltage - Supply (vcc/vdd): 2 V ~ 5.5 V
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 28-VQFN Exposed Pad, 28-HVQFN, 28-SQFN, 28-DHVQFN
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Data Converters: -
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

variables or other data that are updated often). When
PIC16F627A/628A/648A
13.7
The data EEPROM is a high endurance, byte
addressable array that has been optimized for the storage
of frequently changing information (e.g., program
variables in one section change frequently, while
variables in another section do not change, it is possible
to exceed the total number of write cycles to the EEPROM
(specification D124) without exceeding the total number
of write cycles to a single byte (specifications D120 and
D120A). If this is the case, then an array refresh must be
performed. For this reason, variables that change
infrequently (such as constants, IDs, calibration, etc.)
should be stored in Flash program memory.
EXAMPLE 13-4:
DS40044G-page 94
Loop
#IFDEF __16F648A
#ELSE
#ENDIF
BANKSEL
CLRF
BCF
BTFSC
GOTO
BSF
BSF
MOVLW
MOVWF
MOVLW
MOVWF
BSF
BTFSC
GOTO
INCFSZ
INCF
BTFSS
GOTO
BCF
BSF
Using the Data EEPROM
0X80
EEADR
INTCON, GIE
INTCON, GIE
$ - 2
EECON1, WREN
EECON1, RD
0x55
EECON2
0xAA
EECON2
EECON1, WR
EECON1, WR
$ - 1
EEADR, f
EEADR, f
EEADR, 7
Loop
EECON1, WREN
INTCON, GIE
DATA EEPROM REFRESH ROUTINE
;select Bank1
;start at address 0
;disable interrupts
;see AN576
;enable EE writes
;retrieve data into EEDATA
;first step of ...
;... required sequence
;second step of ...
;... required sequence
;start write sequence
;wait for write complete
;256 bytes in 16F648A
;test for end of memory
;128 bytes in 16F627A/628A
;next address
;test for end of memory
;end of conditional assembly
;repeat for all locations
;disable EE writes
;enable interrupts (optional)
A simple data EEPROM refresh routine is shown in
Example 13-4.
Note:
If data EEPROM is only used to store
constants and/or data that changes rarely,
an array refresh is likely not required. See
specification D124.
© 2009 Microchip Technology Inc.