PIC16LF870T-I/SS Microchip Technology, PIC16LF870T-I/SS Datasheet - Page 82
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PIC16LF870T-I/SS
Manufacturer Part Number
PIC16LF870T-I/SS
Description
IC,MICROCONTROLLER,8-BIT,PIC CPU,CMOS,SSOP,28PIN,PLASTIC
Manufacturer
Microchip Technology
Series
PIC® 16Fr
Specifications of PIC16LF870T-I/SS
Rohs Compliant
YES
Core Processor
PIC
Core Size
8-Bit
Speed
20MHz
Connectivity
UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
22
Program Memory Size
3.5KB (2K x 14)
Program Memory Type
FLASH
Eeprom Size
64 x 8
Ram Size
128 x 8
Voltage - Supply (vcc/vdd)
2 V ~ 5.5 V
Data Converters
A/D 5x10b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
28-SSOP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
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PIC16F870/871
REGISTER 10-2:
The ADRESH:ADRESL registers contain the 10-bit
result of the A/D conversion. When the A/D conversion
is complete, the result is loaded into this A/D result reg-
ister pair, the GO/DONE bit (ADCON0<2>) is cleared
and the A/D interrupt flag bit ADIF is set. The block
diagram of the A/D module is shown in Figure 10-1.
After the A/D module has been configured as desired,
the selected channel must be acquired before the con-
version is started. The analog input channels must
have their corresponding TRIS bits selected as inputs.
DS30569B-page 80
bit 7
bit 6-4
bit 3-0
ADCON1 REGISTER (ADDRESS: 9Fh)
A = Analog input
bit 7
ADFM: A/D Result Format Select bit
1 = Right justified. 6 Most Significant bits of ADRESH are read as ‘0’.
0 = Left justified. 6 Least Significant bits of ADRESL are read as ‘0’.
Unimplemented: Read as '0'
PCFG3:PCFG0: A/D Port Configuration Control bits:
Legend:
R = Readable bit
- n = Value at POR
PCFG3:
PCFG0
0000
0001
0010
0011
0100
0101
011x
1000
1001
1010
1011
1100
1101
1110
1111
ADFM
Note 1: These channels are not available on the PIC16F870 device.
U-0
2: This column indicates the number of analog channels available as A/D inputs and
AN7
RE2
D
D
D
D
D
D
D
D
D
D
D
D
the number of analog channels used as voltage reference inputs.
A
A
A
(1)
U-0
—
AN6
RE1
D = Digital I/O
A
A
D
D
D
D
D
A
D
D
D
D
D
D
D
(1)
AN5
R/W-0
RE0
D
D
D
D
D
D
D
D
D
A
A
A
A
A
A
—
W = Writable bit
‘1’ = Bit is set
(1)
AN4
RA5
A
A
A
A
D
D
D
A
A
A
A
A
D
D
D
U-0
—
To determine sample time, see Section 10.1. After this
acquisition time has elapsed, the A/D conversion can
be started.
V
V
V
V
V
V
V
V
V
AN3
RA3
REF
REF
REF
REF
REF
REF
REF
REF
REF
A
A
A
D
A
D
+
+
+
+
+
+
+
+
+
PCFG3
V
V
V
V
V
AN2
RA2
R/W-0
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
REF
REF
REF
REF
REF
A
A
A
A
D
D
D
A
A
D
-
-
-
-
-
AN1
RA1
A
A
A
A
A
A
D
A
A
A
A
A
A
D
D
PCFG2
R/W-0
AN0
RA0
2003 Microchip Technology Inc.
D
A
A
A
A
A
A
A
A
A
A
A
A
A
A
V
RA3
RA3
RA3
RA3
RA3
RA3
RA3
RA3
RA3
V
V
V
V
V
V
REF
x = Bit is unknown
PCFG1
DD
DD
DD
DD
DD
DD
R/W-0
+
V
RA2
RA2
RA2
RA2
RA2
V
V
V
V
V
V
V
V
V
V
REF
SS
SS
SS
SS
SS
SS
SS
SS
SS
SS
-
PCFG0
R/W-0
Refs
C
8/0
7/1
5/0
4/1
3/0
2/1
0/0
6/2
6/0
5/1
4/2
3/2
2/2
1/0
1/2
HAN
bit 0
(2)
/
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