PIC18F4520-E/ML Microchip Technology, PIC18F4520-E/ML Datasheet - Page 2

44 PIN, 32 KB ENH FLASH, 3804 RAM, 36 I/O, PB FREE,

PIC18F4520-E/ML

Manufacturer Part Number
PIC18F4520-E/ML
Description
44 PIN, 32 KB ENH FLASH, 3804 RAM, 36 I/O, PB FREE,
Manufacturer
Microchip Technology
Series
PIC® 18Fr

Specifications of PIC18F4520-E/ML

Rohs Compliant
YES
Core Processor
PIC
Core Size
8-Bit
Speed
40MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, HLVD, POR, PWM, WDT
Number Of I /o
36
Program Memory Size
32KB (16K x 16)
Program Memory Type
FLASH
Eeprom Size
256 x 8
Ram Size
1.5K x 8
Voltage - Supply (vcc/vdd)
4.2 V ~ 5.5 V
Data Converters
A/D 13x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
44-QFN
Processor Series
PIC18F
Core
PIC
Data Bus Width
8 bit
Data Ram Size
1.5 KB
Interface Type
MSSP, SPI, I2C, PSP, USART
Maximum Clock Frequency
40 MHz
Number Of Programmable I/os
36
Number Of Timers
1 x 8
Operating Supply Voltage
2 V to 5.5 V
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52715-96, 52716-328, 52717-734, 52712-325, 53275-917, EWPIC18
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120, ICE2000, ICE4000, DV164136, DM163022
Minimum Operating Temperature
- 40 C
On-chip Adc
13 bit
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
PIC18F2420/2520/4420/4520
3. Module: Enhanced Universal
REGISTER 18-3:
DS80304D-page 2
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 7
bit 6
bit 5
bit 4
bit 3
bit 2
ABDOVF
One bit has been added to the BAUDCON register
and one bit has been renamed. The added bit is
RXDTP and is in the location, BAUDCON<5>. The
renamed bit is the TXCKP bit (BAUDCON<4>),
which had been named SCKP.
The
(BAUDCON<5>) bits enable the TX and RX
signals to be inverted (polarity reversed).
R/W-0
TXCKP
Synchronous Receiver
Transmitter (EUSART)
ABDOVF: Auto-Baud Acquisition Rollover Status bit
1 = A BRG rollover has occurred during Auto-Baud Rate Detect mode
0 = No BRG rollover has occurred
RCIDL: Receive Operation Idle Status bit
1 = Receive operation is Idle
0 = Receive operation is Active
RXDTP: Receive Data Polarity Select bit
Asynchronous mode:
1 = Receive data (RX) is inverted. Idle state is a low level.
0 = No inversion of receive data (RX). Idle state is a high level.
Synchronous mode:
1 = Data (DT) is inverted. Idle state is a low level.
0 = No inversion of data (DT). Idle state is a high level.
TXCKP: Transmit/Clock Polarity Select bit
Asynchronous mode:
1 = Transmit data (TX) is inverted. Idle state is a low level.
0 = No inversion of transmit data (TX). Idle state is a high level.
Synchronous mode:
1 = Idle state for clock (CK) is a high level
0 = Idle state for clock (CK) is a low level
BRG16: 16-bit Baud Rate Register Enable bit
1 = 16-bit Baud Rate Generator – SPBRGH and SPBRG
0 = 8-bit Baud Rate Generator – SPBRG only (Compatible mode); SPBRGH value ignored
Unimplemented: Read as ‘0’
RCIDL
(BAUDCON<4>)
R-1
(must be cleared in software)
BAUDCON: BAUD RATE CONTROL REGISTER
W = Writable bit
‘1’ = Bit is set
RXDTP
R/W-0
and
RXDTP
TXCKP
R/W-0
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
BRG16
R/W-0
Register 18-3, on page 194, will be changed as
shown.
Work around
None required.
Date Codes that pertain to this issue:
All engineering and production devices.
U-0
 2009 Microchip Technology Inc.
x = Bit is unknown
R/W-0
WUE
ABDEN
R/W-0
bit 0

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