PIC18F4550T-I/PT Microchip Technology, PIC18F4550T-I/PT Datasheet - Page 5

• Manufacturer Part Number: PIC18F4550T-I/PT
• Description: IC,MICROCONTROLLER,8-BIT,PIC CPU,CMOS,TQFP,44PIN,PLASTIC
• Manufacturer: Microchip Technology
• Series: PIC® 18Fr

Specifications of PIC18F4550T-I/PT

• Rohs Compliant: YES
• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 48MHz
• Connectivity: I²C, SPI, UART/USART, USB
• Peripherals: Brown-out Detect/Reset, HLVD, POR, PWM, WDT
• Number Of I /o: 35
• Program Memory Size: 32KB (16K x 16)
• Program Memory Type: FLASH
• Eeprom Size: 256 x 8
• Ram Size: 2K x 8
• Voltage - Supply (vcc/vdd): 4.2 V ~ 5.5 V
• Data Converters: A/D 13x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 44-TQFP, 44-VQFP
• Processor Series: PIC18F
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 2 KB
• Interface Type: SPI, I2C, EAUSART
• Maximum Clock Frequency: 48 MHz
• Number Of Programmable I/os: 35
• Number Of Timers: 4
• Operating Supply Voltage: 2 V to 5.5 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, PG164120, ICE2000, ICE4000, DV164136, DM163022
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 13 Channel
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: GPIODM-KPLCD - BOARD DEMO LCD GPIO EXP KEYPADI3-DB18F4550 - BOARD DAUGHTER ICEPIC3DM163025 - PIC DEM FULL SPEED USB DEMO BRD
• Lead Free Status / Rohs Status: Details

4. Module: Interrupts
EXAMPLE 1:
© 2009 Microchip Technology Inc.
ISR @ 0x0008
Foo:
CALL Foo, FAST; store current value of WREG, BSR, STATUS for a second time
POP
:
:
RETFIEFAST
If an interrupt occurs during a two-cycle instruc-
tion that modifies the STATUS, BSR or WREG
register, the unmodified value of the register will
be saved to the corresponding Fast Return
(Shadow) register and upon a fast return from the
interrupt, the unmodified value will be restored to
the STATUS, BSR or WREG register.
For example, if a high-priority interrupt occurs
during the instruction, “MOVFF TEMP, WREG”,
the MOVFF instruction will be completed and
WREG will be loaded with the value of TEMP
before branching to ISR. However, the previous
value of WREG will be saved to the Fast Return
register during ISR branching. Upon return from
the interrupt with a fast return, the previous value
of WREG in the Fast Return register will be
written to WREG.
This results in WREG containing the value it had
before execution of “MOVFF TEMP, WREG“.
Affected instructions are:
Work around
Alternative work arounds are available for the
Assembly Language Programming and the C
Programming Language:
MOVFF Fs, Fd
Where Fd is WREG, BSR or STATUS
MOVSF Zs, Fd
Where Fd is WREG, BSR or STATUS
MOVSS [Zs], [Zd]
Where the destination is WREG, BSR or
STATUS
; clears return address of Foo call
; insert high priority ISR code here
INTERRUPT WORK AROUND – ASSEMBLY
PIC18F2455/2550/4455/4550
Assembly Language Programming
Either of two work arounds can be used:
• If any two-cycle instruction is used to modify
• As another alternative, use the work around
the WREG, BSR or STATUS register, do not
use the RETFIE FAST instruction to return
from the interrupt. Instead, save/restore
WREG, BSR and STATUS via software per
Example 9-1 in the Device Data Sheet.
Alternatively, in the case of MOVFF, use the
MOVF instruction to write to WREG instead.
For example, use:
shown in Example 1. This example overwrites
the Fast Return register by making a
dummy call to Foo with the fast option in the
high-priority service routine.
MOVF
MOVWF
instead of: MOVFF TEMP, BSR.
TEMP, W
BSR
DS80478A-page 5