PIC18LF24J10-I/ML Microchip Technology, PIC18LF24J10-I/ML Datasheet - Page 137
![Microcontroller](/photos/6/81/68120/150-28-qfn_sml.jpg)
PIC18LF24J10-I/ML
Manufacturer Part Number
PIC18LF24J10-I/ML
Description
Microcontroller
Manufacturer
Microchip Technology
Series
PIC® 18Fr
Datasheets
1.PIC16F616T-ISL.pdf
(8 pages)
2.PIC18F24J10-ISO.pdf
(368 pages)
3.PIC18F24J10-ISO.pdf
(6 pages)
4.PIC18F24J10-ISO.pdf
(6 pages)
5.PIC18F24J10-ISO.pdf
(12 pages)
6.PIC18LF24J10-ISS.pdf
(32 pages)
Specifications of PIC18LF24J10-I/ML
Core Processor
PIC
Core Size
8-Bit
Speed
40MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
21
Program Memory Size
16KB (8K x 16)
Program Memory Type
FLASH
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
2 V ~ 3.6 V
Data Converters
A/D 10x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
28-VQFN Exposed Pad, 28-HVQFN, 28-SQFN, 28-DHVQFN
Processor Series
PIC18LF
Core
PIC
Data Bus Width
8 bit
Data Ram Size
1 KB
Interface Type
SPIC, I2C, EUSART
Maximum Clock Frequency
40 MHz
Number Of Programmable I/os
21
Number Of Timers
3
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120, DM183032, DV164136
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 10 Channel
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
AC162074 - HEADER INTRFC MPLAB ICD2 44TQFPMA180012 - MODULE PLUG-IN 18LF25J10 28SOICAC162067 - HEADER INTRFC MPLAB ICD2 40/28PXLT28QFN4 - SOCKET TRANS ICE 28QFN W/CABLE
Eeprom Size
-
Lead Free Status / Rohs Status
Details
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
PIC18LF24J10-I/ML
Manufacturer:
MICROCHIP
Quantity:
12 000
- PIC16F616T-ISL PDF datasheet
- PIC18F24J10-ISO PDF datasheet #2
- PIC18F24J10-ISO PDF datasheet #3
- PIC18F24J10-ISO PDF datasheet #4
- PIC18F24J10-ISO PDF datasheet #5
- PIC18LF24J10-ISS PDF datasheet #6
- Current page: 137 of 368
- Download datasheet (6Mb)
15.0
In
implemented as a standard CCP module with
Enhanced PWM capabilities. These include the
provisions for 2 or 4 output channels, user-selectable
polarity, dead-band control and automatic shutdown
REGISTER 15-1:
© 2009 Microchip Technology Inc.
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 7-6
bit 5-4
bit 3-0
Note:
R/W-0
P1M1
PIC18F44J10/45J10
ENHANCED CAPTURE/
COMPARE/PWM (ECCP)
MODULE
The ECCP module is implemented only in
40/44-pin devices.
P1M<1:0>: Enhanced PWM Output Configuration bits
If CCP1M<3:2> = 00, 01, 10:
xx = P1A assigned as Capture/Compare input/output; P1B, P1C, P1D assigned as port pins
If CCP1M<3:2> = 11:
00 = Single output: P1A modulated; P1B, P1C, P1D assigned as port pins
01 = Full-bridge output forward: P1D modulated; P1A active; P1B, P1C inactive
10 = Half-bridge output: P1A, P1B modulated with dead-band control; P1C, P1D assigned as port pins
11 = Full-bridge output reverse: P1B modulated; P1C active; P1A, P1D inactive
DC1B<1:0>: PWM Duty Cycle bit 1 and bit 0
Capture mode:
Unused.
Compare mode:
Unused.
PWM mode:
These bits are the two LSbs of the 10-bit PWM duty cycle. The eight MSbs of the duty cycle are found
in CCPR1L.
CCP1M<3:0>: CCP1 Module Mode Select bits
0000 = Capture/Compare/PWM off (resets ECCP module)
0001 = Reserved
0010 = Compare mode, toggle output on match
0011 = Capture mode
0100 = Capture mode, every falling edge
0101 = Capture mode, every rising edge
0110 = Capture mode, every 4th rising edge
0111 = Capture mode, every 16th rising edge
1000 = Compare mode, initialize CCP1 pin low, set output on compare match (set CCP1IF)
1001 = Compare mode, initialize CCP1 pin high, clear output on compare match (set CCP1IF)
1010 = Compare mode, generate software interrupt only, CCP1 pin reverts to I/O state
1011 = Compare mode, trigger special event (ECCP resets TMR1, sets CCP1IF bit)
1100 = PWM mode; P1A, P1C active-high; P1B, P1D active-high
1101 = PWM mode; P1A, P1C active-high; P1B, P1D active-low
1110 = PWM mode; P1A, P1C active-low; P1B, P1D active-high
1111 = PWM mode; P1A, P1C active-low; P1B, P1D active-low
R/W-0
P1M0
CCP1CON: ECCP1 CONTROL REGISTER (40/44-PIN DEVICES)
devices,
W = Writable bit
‘1’ = Bit is set
DC1B1
R/W-0
ECCP1
DC1B0
R/W-0
is
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
PIC18F45J10 FAMILY
CCP1M3
R/W-0
and restart. The Enhanced features are discussed in
detail in Section 15.4 “Enhanced PWM Mode”.
Capture, Compare and single output PWM functions of
the ECCP module are the same as described for the
standard CCP module.
The control register for the Enhanced CCP module is
shown in Register 15-1. It differs from the CCP1CON
register in PIC18F24J10/25J10 devices in that the two
Most Significant bits are implemented to control PWM
functionality.
CCP1M2
R/W-0
x = Bit is unknown
CCP1M1
R/W-0
DS39682E-page 135
CCP1M0
R/W-0
bit 0
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