PIC18LF24J10T-I/SS Microchip Technology, PIC18LF24J10T-I/SS Datasheet - Page 95

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PIC18LF24J10T-I/SS

Manufacturer Part Number
PIC18LF24J10T-I/SS
Description
Microcontroller
Manufacturer
Microchip Technology
Series
PIC® 18Fr

Specifications of PIC18LF24J10T-I/SS

Core Processor
PIC
Core Size
8-Bit
Speed
40MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
21
Program Memory Size
16KB (8K x 16)
Program Memory Type
FLASH
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
2 V ~ 3.6 V
Data Converters
A/D 10x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
28-SSOP
Processor Series
PIC18LF
Core
PIC
Data Bus Width
8 bit
Data Ram Size
1 KB
Interface Type
SPIC, I2C, EUSART
Maximum Clock Frequency
40 MHz
Number Of Programmable I/os
21
Number Of Timers
3
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120, DM183032, DV164136
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 10 Channel
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
AC162074 - HEADER INTRFC MPLAB ICD2 44TQFPMA180012 - MODULE PLUG-IN 18LF25J10 28SOICAC162067 - HEADER INTRFC MPLAB ICD2 40/28PAC164331 - MODULE SKT FOR 28SSOP 18F45J10
Eeprom Size
-
Lead Free Status / Rohs Status
 Details
Other names
PIC18LF24J10T-I/SSTR
REGISTER 9-11:
REGISTER 9-12:
© 2009 Microchip Technology Inc.
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 7
bit 6
bit 5-4
bit 3
bit 2-1
bit 0
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 7
bit 6
bit 5-0
OSCFIP
SSP2IP
R/W-1
R/W-1
OSCFIP: Oscillator Fail Interrupt Priority bit
1 = High priority
0 = Low priority
CMIP: Comparator Interrupt Priority bit
1 = High priority
0 = Low priority
Unimplemented: Read as ‘0’
BCL1IP: Bus Collision Interrupt Priority bit (MSSP1 module)
1 = High priority
0 = Low priority
Unimplemented: Read as ‘0’
CCP2IP: CCP2 Interrupt Priority bit
1 = High priority
0 = Low priority
SSP2IP: Master Synchronous Serial Port 2 Interrupt Priority bit
1 = High priority
0 = Low priority
BCL2IP: Bus Collision Interrupt Priority bit (MSSP2 module)
1 = High priority
0 = Low priority
Unimplemented: Read as ‘0’
BCL2IP
R/W-1
R/W-1
CMIP
IPR2: PERIPHERAL INTERRUPT PRIORITY REGISTER 2
IPR3: PERIPHERAL INTERRUPT PRIORITY REGISTER 3
W = Writable bit
W = Writable bit
‘1’ = Bit is set
‘1’ = Bit is set
U-0
U-0
U-0
U-0
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
PIC18F45J10 FAMILY
BCL1IP
R/W-1
U-0
U-0
U-0
x = Bit is unknown
x = Bit is unknown
U-0
U-0
DS39682E-page 93
CCP2IP
R/W-0
U-0
bit 0
bit 0

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