PIC18LF2585-I/SP Microchip Technology, PIC18LF2585-I/SP Datasheet - Page 10

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PIC18LF2585-I/SP

Manufacturer Part Number
PIC18LF2585-I/SP
Description
IC,MICROCONTROLLER,8-BIT,PIC CPU,CMOS,DIP,28PIN,PLASTIC
Manufacturer
Microchip Technology
Series
PIC® 18Fr

Specifications of PIC18LF2585-I/SP

Rohs Compliant
YES
Core Processor
PIC
Core Size
8-Bit
Speed
40MHz
Connectivity
CAN, I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, HLVD, POR, PWM, WDT
Number Of I /o
25
Program Memory Size
48KB (24K x 16)
Program Memory Type
FLASH
Eeprom Size
1K x 8
Ram Size
3.25K x 8
Voltage - Supply (vcc/vdd)
2 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
28-DIP (0.300", 7.62mm)
Processor Series
PIC18LF
Core
PIC
Data Bus Width
8 bit
Data Ram Size
3.25 KB
Interface Type
I2C, SPI, EUSART
Maximum Clock Frequency
40 MHz
Number Of Programmable I/os
28
Number Of Timers
1 x 8
Operating Supply Voltage
2 V to 5.5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
Through Hole
3rd Party Development Tools
52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120, ICE2000, ICE4000, DM163011, DV164136
Minimum Operating Temperature
- 40 C
On-chip Adc
8
Data Rom Size
1024 B
Height
3.3 mm
Length
34.67 mm
Supply Voltage (max)
5.5 V
Supply Voltage (min)
2 V
Width
7.24 mm
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
PIC18F2585/2680/4585/4680
33. Module: ECAN™ Technology
EXAMPLE 6:
34. Module: 10-Bit Analog-to-Digital
DS80202G-page 10
If (RXBnOVFL == 1)
Under specific conditions, the TXBxSIDH register
of the pending message for transmission may be
corrupted. The following conditions must exist for
this event to occur:
1. A transmit message must be pending.
2. All of the receive buffers must be full and a
3. A receiver buffer must be made available
When the AD clock source is selected as 2 T
RC (when ADCS2:ADCS0 = 000 or x11), in
extremely rare cases, the E
Error) and E
exceed the data sheet specification at codes 511
and 512 only.
Work around
Select the AD clock source as 4 T
16 T
2 T
Date Codes that pertain to this issue:
All engineering and production devices.
OSC
received message is in the Message Assembly
Buffer (MAB).
(RXBxCON<RXFUL> set to ‘0’) when a Start-
of-Frame (SOF) is recognized on the CAN bus,
or on the instruction cycle prior to the SOF for
the TXBxSIDH corruption event to occur. The
timing of this event is crucial.
OSC
{
}
Temp_RXREG = RXBx; // Read receive buffer
If (MyFlag)
{
}
or RC.
, 32 T
Converter
If (TXREQ == 1)// Is a transmission pending?
{
}
TXREQ = 1;
MyFlag = 0;
DL
OSC
TXREQ = 0; // Clear transmit request
If (TXABT == 1)// Store transmission aborted status value
(Differential Linearity Error) may
or 64 T
MyFlag = 1;
// Has an overflow occurred?
OSC
// Was previous transmission aborted?
// Set transmit request
// Reset stored transmission aborted status
IL
and avoid selecting
(Integral Linearity
OSC
, 8 T
OSC
OSC
or
,
Work around
Ensure that a receive buffer overflow condition
does not occur, and/or ensure that a transmit
request is not pending, if a receive buffer overflow
condition does exist.
The pseudo-code segment in Example 6 is an
example of how to disable a pending transmission.
This code is for illustration purposes only.
Date Codes that pertain to this issue:
All engineering and production devices.
© 2007 Microchip Technology Inc.

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