PIC18LF4420-I/P Microchip Technology, PIC18LF4420-I/P Datasheet - Page 7
![IC,MICROCONTROLLER,8-BIT,PIC CPU,CMOS,DIP,40PIN,PLASTIC](/photos/6/61/66192/150-40-dip_sml.jpg)
PIC18LF4420-I/P
Manufacturer Part Number
PIC18LF4420-I/P
Description
IC,MICROCONTROLLER,8-BIT,PIC CPU,CMOS,DIP,40PIN,PLASTIC
Manufacturer
Microchip Technology
Series
PIC® 18Fr
Datasheets
1.PIC18F2221-ISO.pdf
(46 pages)
2.PIC18F2420-IML.pdf
(412 pages)
3.PIC18F2420-IML.pdf
(16 pages)
4.PIC18F2420-IML.pdf
(8 pages)
5.PIC18F2420-IML.pdf
(6 pages)
6.PIC18F2420-IML.pdf
(8 pages)
7.PIC18F2420-IML.pdf
(4 pages)
Specifications of PIC18LF4420-I/P
Rohs Compliant
YES
Core Processor
PIC
Core Size
8-Bit
Speed
40MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, HLVD, POR, PWM, WDT
Number Of I /o
36
Program Memory Size
16KB (8K x 16)
Program Memory Type
FLASH
Eeprom Size
256 x 8
Ram Size
768 x 8
Voltage - Supply (vcc/vdd)
2 V ~ 5.5 V
Data Converters
A/D 13x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
40-DIP (0.600", 15.24mm)
Processor Series
PIC18LF
Core
PIC
Data Bus Width
8 bit
Data Ram Size
768 B
Interface Type
MSSP, SPI, I2C, PSP, USART
Maximum Clock Frequency
40 MHz
Number Of Programmable I/os
36
Number Of Timers
1 x 8
Operating Supply Voltage
2 V to 5.5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
Through Hole
3rd Party Development Tools
52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120, ICE2000, ICE4000, DV164136
Minimum Operating Temperature
- 40 C
On-chip Adc
13 bit
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
PIC18LF4420-I/PT
Manufacturer:
Microchip Technology
Quantity:
10 000
For PIC18FX4X0/X4X3 devices, the code memory
space extends from 000000h to 003FFFh (16 Kbytes)
in two 8-Kbyte blocks. Addresses, 000000h through
0003FFh, however, define a “Boot Block” region that is
treated separately from Block 0. All of these blocks
define code protection boundaries within the code
memory space.
FIGURE 2-6:
2010 Microchip Technology Inc.
Note:
1FFFFFh
3FFFFFh
000000h
200000h
MEMORY MAP AND THE CODE MEMORY SPACE
FOR PIC18FX4X0/X4X3 DEVICES
Sizes of memory areas are not to scale.
Unimplemented
Code Memory
Configuration
Read as ‘0’
and ID
Space
PIC18F2XXX/4XXX FAMILY
008000h
TABLE 2-5:
PIC18F2410
PIC18F2420
PIC18F2423
PIC18F2450
PIC18F4410
PIC18F4420
PIC18F4450
Device
(PIC18FX4X0/X4X3)
MEMORY SIZE/
Unimplemented
Reads all ‘0’s
Boot Block
16 Kbytes
DEVICE
Block 0
Block 1
IMPLEMENTATION OF CODE
MEMORY
Code Memory Size (Bytes)
000000h-003FFFh (16K)
000000h
0007FFh
000800h
001FFFh
002000h
003FFFh
004000h
005FFFh
006000h
007FFFh
1FFFFFh
Address
Range
DS39622L-page 7