PIC18LF44J10-I/PT Microchip Technology, PIC18LF44J10-I/PT Datasheet - Page 27
![Microcontroller](/photos/6/82/68251/c04-076_pt_sml.jpg)
PIC18LF44J10-I/PT
Manufacturer Part Number
PIC18LF44J10-I/PT
Description
Microcontroller
Manufacturer
Microchip Technology
Series
PIC® 18Fr
Datasheets
1.PIC16F616T-ISL.pdf
(8 pages)
2.PIC18F24J10-ISO.pdf
(368 pages)
3.PIC18F24J10-ISO.pdf
(6 pages)
4.PIC18F24J10-ISO.pdf
(6 pages)
5.PIC18F24J10-ISO.pdf
(12 pages)
6.PIC18LF24J10-ISS.pdf
(32 pages)
Specifications of PIC18LF44J10-I/PT
Core Processor
PIC
Core Size
8-Bit
Speed
40MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
32
Program Memory Size
16KB (8K x 16)
Program Memory Type
FLASH
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
2 V ~ 3.6 V
Data Converters
A/D 13x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
44-TQFP, 44-VQFP
Processor Series
PIC18LF
Core
PIC
Data Bus Width
8 bit
Data Ram Size
1 KB
Interface Type
SPIC, I2C, EUSART
Maximum Clock Frequency
40 MHz
Number Of Programmable I/os
32
Number Of Timers
3
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120, DM183022, DM183032, DV164136
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 13 Channel
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
AC162074 - HEADER INTRFC MPLAB ICD2 44TQFPMA180014 - MODULE PLUG-IN 18LF45J10 44TQFPAC162067 - HEADER INTRFC MPLAB ICD2 40/28PAC164330 - MODULE SKT FOR 44TQFP 18F45J10
Eeprom Size
-
Lead Free Status / Rohs Status
Details
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
PIC18LF44J10-I/PT
Manufacturer:
MICROCHIP
Quantity:
12 000
Company:
Part Number:
PIC18LF44J10-I/PT
Manufacturer:
Microchip Technology
Quantity:
10 000
- PIC16F616T-ISL PDF datasheet
- PIC18F24J10-ISO PDF datasheet #2
- PIC18F24J10-ISO PDF datasheet #3
- PIC18F24J10-ISO PDF datasheet #4
- PIC18F24J10-ISO PDF datasheet #5
- PIC18LF24J10-ISS PDF datasheet #6
- Current page: 27 of 368
- Download datasheet (6Mb)
2.4
When the regulator is enabled (F devices), a low-ESR
(<5Ω) capacitor is required on the V
stabilize the voltage regulator output voltage. The
V
must use a capacitor (10 μF typical) connected to
ground. The type can be ceramic or tantalum. A suitable
example is the Murata GRM21BF50J106ZE01 (10 μF,
6.3V) or equivalent. Designers may use Figure 2-3 to
evaluate ESR equivalence of candidate devices.
It is recommended that the trace length not exceed
0.25 inch (6 mm). Refer to Section 24.0 “Electrical
Characteristics” for additional information.
When the regulator is disabled (LF devices), the
V
the V
Characteristics”
V
FIGURE 2-3:
© 2009 Microchip Technology Inc.
CAP
CAP
DDCORE
0.001
Note:
0.01
/V
0.1
/V
DDCORE
10
1
DDCORE
DDCORE
0.01
Voltage Regulator Pins
(V
.
CAP
Data for Murata GRM21BF50J106ZE01 shown.
Measurements at 25°C, 0V DC bias.
level. Refer to Section 24.0 “Electrical
0.1
pin must not be connected to V
pin must be tied to a voltage supply at
/V
DDCORE
Frequency (MHz)
for
FREQUENCY vs. ESR
PERFORMANCE FOR
SUGGESTED V
1
information
)
10
CAP
100
/V
on
DDCORE
CAP
1000 10,000
V
DD
DD
pin to
and
and
PIC18F45J10 FAMILY
2.5
The PGC and PGD pins are used for In-Circuit Serial
Programming (ICSP) and debugging purposes. It is
recommended to keep the trace length between the
ICSP connector and the ICSP pins on the device as
short as possible. If the ICSP connector is expected to
experience an ESD event, a series resistor is recom-
mended, with the value in the range of a few tens of
ohms, not to exceed 100Ω.
Pull-up resistors, series diodes and capacitors on the
PGC and PGD pins are not recommended as they will
interfere
munications to the device. If such discrete components
are an application requirement, they should be removed
from the circuit during programming and debugging.
Alternatively, refer to the AC/DC characteristics and
timing requirements information in the respective device
Flash programming specification for information on
capacitive loading limits and pin input voltage high (V
and input low (V
For device emulation, ensure that the “Communication
Channel Select” (i.e., PGC/PGD pins) programmed
into the device matches the physical connections for
the ICSP to the MPLAB
REAL ICE™ emulator.
For more information on the ICD 2, ICD 3 and REAL ICE
emulator connection requirements, refer to the following
documents that are available on the Microchip web site.
• “MPLAB
• “Using MPLAB
• “MPLAB
• “Using MPLAB
• “MPLAB
• “MPLAB
• “Using MPLAB
Guide” (DS51331)
Guide” (DS51616)
(poster) (DS51749)
ICSP Pins
®
®
®
®
with
ICD 2 In-Circuit Debugger User’s
ICD 2 Design Advisory” (DS51566)
ICD 3 Design Advisory” (DS51764)
REAL ICE™ In-Circuit Emulator User’s
IL
®
®
®
) requirements.
the
ICD 2” (poster) (DS51265)
ICD 3” (poster) (DS51765)
REAL ICE™ In-Circuit Emulator”
programmer/debugger
®
ICD 2, MPLAB ICD 3 or
DS39682E-page 25
com-
IH
)
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