PIC18LF4682-I/PT Microchip Technology, PIC18LF4682-I/PT Datasheet - Page 229

80KB Flash, 3KB RAM, ECAN, 1024 EEPROM 44 TQFP 10x10x1mm TRAY

PIC18LF4682-I/PT

Manufacturer Part Number
PIC18LF4682-I/PT
Description
80KB Flash, 3KB RAM, ECAN, 1024 EEPROM 44 TQFP 10x10x1mm TRAY
Manufacturer
Microchip Technology
Series
PIC® 18Fr

Specifications of PIC18LF4682-I/PT

Core Processor
PIC
Core Size
8-Bit
Speed
40MHz
Connectivity
CAN, I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, HLVD, POR, PWM, WDT
Number Of I /o
36
Program Memory Size
80KB (40K x 16)
Program Memory Type
FLASH
Eeprom Size
1K x 8
Ram Size
3.25K x 8
Voltage - Supply (vcc/vdd)
2 V ~ 5.5 V
Data Converters
A/D 11x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
44-TQFP, 44-VQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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18.0
The Enhanced Universal Synchronous Asynchronous
Receiver Transmitter (EUSART) module is one of the
two serial I/O modules. (USART is also known as a
Serial Communications Interface or
EUSART can be configured as a full-duplex asynchro-
nous system that can communicate with peripheral
devices, such as CRT terminals and personal comput-
ers. It can also be configured as a half-duplex synchro-
nous system that can communicate with peripheral
devices, such as A/D or D/A integrated circuits, serial
EEPROMs and so on.
The EUSART module implements additional features,
including Auto-Baud Rate Detection and calibration,
automatic wake-up on Sync Break reception and 12-bit
Break character transmit. These features make it
ideally suited for use in Local Interconnect Network bus
(LIN bus) systems.
The EUSART can be configured in the following
modes:
• Asynchronous (full duplex) with:
• Synchronous – Master (half duplex) with
• Synchronous – Slave (half duplex) with
© 2009 Microchip Technology Inc.
- Auto-Wake-up on Character Reception
- Auto-Baud Calibration
- 12-Bit Break Character Transmission
Selectable Clock Polarity
Selectable Clock Polarity
ENHANCED UNIVERSAL
SYNCHRONOUS RECEIVER
TRANSMITTER (EUSART)
SCI.)
PIC18F2682/2685/4682/4685
The
The pins of the Enhanced USART are multiplexed
with PORTC. In order to configure RC6/TX/CK and
RC7/RX/DT as an EUSART:
• bit SPEN (RCSTA<7>) must be set (= 1)
• bit TRISC<7> must be set (= 1)
• bit TRISC<6> must be cleared (= 0) for
The operation of the Enhanced USART module is
controlled through three registers:
• Transmit Status and Control (TXSTA)
• Receive Status and Control (RCSTA)
• Baud Rate Control (BAUDCON)
These are detailed on the following pages in
Register 18-1,
respectively.
Asynchronous and Synchronous Master modes,
or set (= 1) for Synchronous Slave mode
Note:
The EUSART control will automatically
reconfigure the pin from input to output as
needed.
Register 18-2
and
DS39761C-page 229
Register 18-3,

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