S29AL004D90TFI020 Spansion Inc., S29AL004D90TFI020 Datasheet - Page 24
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S29AL004D90TFI020
Manufacturer Part Number
S29AL004D90TFI020
Description
Flash Memory IC
Manufacturer
Spansion Inc.
Specifications of S29AL004D90TFI020
Memory Size
4Mbit
Memory Configuration
512K X 8 / 256K X 16
Ic Interface Type
Parallel
Access Time
90ns
Memory Case Style
TSOP
No. Of Pins
48
Operating Temperature Range
-40°C To +85°C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
S29AL004D90TFI020
Manufacturer:
SPANSION
Quantity:
4 300
Part Number:
S29AL004D90TFI020H
Manufacturer:
SPANSION
Quantity:
20 000
22
Sector Erase Command Sequence
Erase Suspend/Erase Resume Commands
Figure 4, on page 24
Table 12 on page 41
diagrams.
Sector erase is a six bus cycle operation. The sector erase command sequence is
initiated by writing two unlock cycles, followed by a set-up command. Two addi-
tional unlock write cycles are then followed by the address of the sector to be
erased, and the sector erase command.
data requirements for the sector erase command sequence.
The device does not require the system to preprogram the memory prior to erase.
The Embedded Erase algorithm automatically programs and verifies the sector for
an all zero data pattern prior to electrical erase. The system is not required to
provide any controls or timings during these operations.
After the command sequence is written, a sector erase time-out of 50 µs begins.
During the time-out period, additional sector addresses and sector erase com-
mands may be written. Loading the sector erase buffer may be done in any
sequence, and the number of sectors may be from one sector to all sectors. The
time between these additional cycles must be less than 50 µs, otherwise the last
address and command might not be accepted, and erasure may begin. It is rec-
ommended that processor interrupts be disabled during this time to ensure all
commands are accepted. The interrupts can be re-enabled after the last Sector
Erase command is written. If the time between additional sector erase commands
can be assumed to be less than 50 µs, the system need not monitor DQ3. Any
command other than Sector Erase or Erase Suspend during the time-out
period resets the device to reading array data. The system must rewrite the
command sequence and any additional sector addresses and commands.
The system can monitor DQ3 to determine if the sector erase timer has timed
out. (See
rising edge of the final WE# pulse in the command sequence.
Once the sector erase operation has begun, only the Erase Suspend command is
valid. All other commands are ignored. Note that a hardware reset during the
sector erase operation immediately terminates the operation. The Sector Erase
command sequence should be reinitiated once the device has returned to reading
array data, to ensure data integrity.
When the Embedded Erase algorithm is complete, the device returns to reading
array data and addresses are no longer latched. The system can determine the
status of the erase operation by using DQ7, DQ6, DQ2, or RY/BY#. Refer to
Operation Status‚ on page 26
Figure 4, on page 24
Table 12 on page 41
diagrams.
The Erase Suspend command allows the system to interrupt a sector erase oper-
ation and then read data from, or program data to, any sector not selected for
erasure. This command is valid only during the sector erase operation, including
the 50 µs time-out period during the sector erase command sequence. The Erase
Suspend command is ignored if written during the chip erase operation or Em-
bedded Program algorithm. Writing the Erase Suspend command during the
DQ3: Sector Erase Timer‚ on page
for parameters, and to
illustrates the algorithm for the erase operation. Refer to
for parameters, and
illustrates the algorithm for the erase operation. See
A d v a n c e
for information on these status bits.
S29AL004D
Table on page 24
Figure 18, on page 43
I n f o r m a t i o n
29). The time-out begins from the
Figure 18, on page 43
shows the address and
for timing
for timing
S29AL004D_00_A1 February 18, 2005
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