SCANSTA101SM National Semiconductor, SCANSTA101SM Datasheet - Page 26

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SCANSTA101SM

Manufacturer Part Number
SCANSTA101SM
Description
IC,Test/JTAG Support,CMOS,BGA,49PIN,PLASTIC
Manufacturer
National Semiconductor
Datasheets

Specifications of SCANSTA101SM

Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant

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Note 19: Reserved Vector x Interrupt for future growth for the number of vectors.
Note 20: Drivers shouldn't allow Sequencer Interrupt and Vector x Interrupt to be set at same time. Sequencer Interrupt has priority over the Vector x Interrupt.
Note 21: Half full or half empty designates 56 long words.
Note 22: This register is writable in debug mode only.
TDO Half-empty Interrupt
TDO Empty Interrupt
TDI Full Interrupt
TDI Half-full Interrupt
Sequencer Interrupt
Vector Interrupt<2:0>
Bit(s)
15:13
7:3
2:0
12
11
10
9
8
'000'
'001'
'010'
'011'
'100'
'1'
'0'
'1'
'0'
'1'
'0'
'1'
'0'
'1'
'0'
Type
RW
RW
RW
RW
RW
RW
RO
RO
TABLE 22. Interrupt Status Register (INTSTAT) ($03) (Note 22)
Reserved
TDO Half-empty Interrupt (Note 21)
TDO Empty Interrupt
TDI Full Interrupt
TDI Half-full Interrupt (Note 21)
Sequencer Interrupt
Reserved Vector x Interrupt (Notes 19,
20)
Vector x Interrupt (Note 20)
TDO_SM memory space half empty status
TDO_SM memory space half empty
TDO_SM memory space not half empty
TDO_SM memory space empty status
TDO_SM memory space empty
TDO_SM memory space not empty
TDI_SM memory space full status
TDI_SM memory space full
TDI_SM memory space not full
TDI_SM memory space half full status
TDI_SM memory space half full
TDI_SM memory space not half full
Sequencer completed status
Sequencer processing completed
Sequencer processing or not started
Vector "x" completed status, where "x" is the vector number, a binary encoding of bits
<2:0>.Only vectors 1 through 4 are valid. Vectors 5 through 7 reserved for future use.
No vector completed activity
Vector 1 completed
Vector 2 completed
Vector 3 completed
Vector 4 completed
Field
26
Address Offset
0
0
0
0
0
0
0
0
Reset Value
00000b
000b
00b
0b
1b
0b
0b
0b
Reset Source
SYS_RST
SYS_RST
SYS_RST
SYS_RST
SYS_RST
SYS_RST

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