TP3094V National Semiconductor, TP3094V Datasheet

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TP3094V

Manufacturer Part Number
TP3094V
Description
IC,PCM CODEC,QUAD,CMOS,LDCC,44PIN,PLASTIC
Manufacturer
National Semiconductor
Datasheet

Specifications of TP3094V

Rohs Compliant
NO

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TP3094 COMBO
Quad PCM Codec/Filter
General Description
The TP3094 is a monolithic PCM Codec and Fil-
ter device implemented using a digital signal pro-
cessing architecture. It provides four voice
channels, combining transmit bandpass and re-
ceive low pass channel filters with companding A-
law or m-law PCM encoders and decoders. The
device is fabricated using National’s advanced
CMOS process.
The device includes anti-aliasing filters and sig-
ma-delta converters dedicated to each channel,
and by a common signal processing unit which
performs all the remaining filtering and process-
ing for the four channels.
The TP3094 includes a flexible PCM digital inter-
face, which allows the device to be connected to
PCM busses of different formats. It can also be
connected with other TP3094 devices in a cas-
cade fashion, for a system with up to 128 POTS
interfaces (when a 2.048MHz PCM bus is used).
© 2000 National Semiconductor Corporation
COMBO
Connection Diagram
®
and TRI-STATE
®
are registered trademarks of National Semiconductor Corporation
AGND1
AGND0
®
GXO2
GXO1
VRO2
VRO1
VXI2
VXI1
VXI0
NC
NF
15
10
11
12
13
14
16
17
7
8
9
18 19
6
5
Order Number TP3094V
See NS Package V44A
20 21 22 23 24
4
TP3094
3
2
1
44
25 26 27 28
43
Features
• Handles four voice channels
• Complete Codec and Filter system including:
• Power down mode for low power consumption
• Compatible to standard time division multi-
• Up to 128 channels (32 devices) can be cas-
• Programmable functions (common for all 4
• Designed for CCITT and LSSGR applications
• Single +5V power supply
• 44 lead PLCC surface mount package
• Maximize line card circuit density
• Use in Central Office, Loop Carrier, and PBX
• Wide operating temperature range
42 41 40
- Transmit and receive channel filters
- A-law or -law companding encoder/decoder
plexed PCM bus
- 8 bit mode, frame signal from external reference
- 32 bit mode, internal TSA, with consecutive TS
caded
channels):
- A-law or -law
- Single MCLK clock,automatically selectable from
- Digital and Analog loopback test modes
equipment subscriber line and trunk cards
85°C
8.192MHz, 4.096MHz, 2.048MHz and
1.536/1.544MHz
39
38
37
36
35
34
33
32
31
30
29
DX
DGND
PT4
DVCC
FSX3
NC
FSR3
FSX2
FSR2
FSX1
FSR1
www.national.com
February 2000
-40°C to

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