A1185EUA Allegro Microsystems Inc, A1185EUA Datasheet - Page 13
![no-image](/images/manufacturer_photos/0/0/32/allegro_microsystems_inc_sml.jpg)
A1185EUA
Manufacturer Part Number
A1185EUA
Description
IC SWITCH HALL EFFECT UNI 3-SIP
Manufacturer
Allegro Microsystems Inc
Type
Unipolar Switchr
Datasheet
1.A1185ELHLT.pdf
(15 pages)
Specifications of A1185EUA
Sensing Range
10G ~ 60G Trip - Programmable, Fixed Release
Voltage - Supply
3.5 V ~ 24 V
Current - Supply
6.9mA
Output Type
Digital, Open Collector
Features
Programmable
Operating Temperature
-40°C ~ 85°C
Package / Case
3-SIP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Current - Output (max)
-
A1185
A1186
Enabling Addressing Mode.
keying sequence used to enable the bitfield addressing mode. As
shown in figure 7, this segment consists of one short V
one V
ruptions. This sequence is designed to prevent the device from
being programmed accidentally, such as by noise on the supply
line.
Address Selection.
target bitfield address, is indicated by a series of V
shown in figure 8.
Lock Bit Programming.
is programmed, and all of the corresponding bitfield-level fuses
are blown, the device-level fuse should be blown. To do so, the
lock bit (bitfield address 32) should be encoded as 1 and have
its fuse blown. This is done in the same manner as permanently
setting the other bitfields, as shown in figure 9.
PM
pulse, and one short V
and
After addressing mode is enabled, the
After the desired B
The first segment of code is a
PH
Chopper-Stabilized Unipolar Hall Effect Switches
pulse, with no supply inter-
Ultrasensitive Two-Wire Field-Programmable
OP
calibration value
PM
pulses, as
PH
pulse,
V
V
V
V
V
V
V
V
V
PM
PH
PM
PH
PH
PM
PL
PL
PL
0
0
0
V+
V+
V+
Figure 9. Pulse sequence to encode lock bit
Figure 7. Addressing mode enable pulse sequence
Figure 8. Pulse sequence to select addresses
Falling edge of final B
Enable
Address 1
115 Northeast Cutoff
1.508.853.5000; www.allegromicro.com
Allegro MicroSystems, Inc.
Worcester, Massachusetts 01615-0036 U.S.A.
Address 2
OP
Encode Lock Bit
address digit
128 pulses
Address
Address n ( ≤ 127)
t
t
Blow
t
12