HMC5843-TR Honeywell Microelectronics & Precision Sensors, HMC5843-TR Datasheet - Page 17

• Manufacturer Part Number: HMC5843-TR
• Description: SENSOR MAGNETIC 3 AXIS 20-LCC
• Manufacturer: Honeywell Microelectronics & Precision Sensors
• Series: HMCr
• Type: Compass - Three Axisr

Specifications of HMC5843-TR

• Sensing Range: ±4g
• Voltage - Supply: 2.5 V ~ 3.3 V
• Current - Supply: 80µA
• Output Type: Differential Voltage
• Features: Compass - Three Axis
• Operating Temperature: -30°C ~ 80°C
• Package / Case: 20-LCC
• Pin Count: 20
• Screening Level: Commercial
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Current - Output (max): -
• Lead Free Status / Rohs Status: Supplier Unconfirmed
• Other names: 342-1071-2; HMC5843

HMC5843
Identification Register A
The identification register A is used to identify the device. IRA0 through IRA7 indicate bit locations, with IRA denoting the
bits that are in the identification register A. IRA7 denotes the first bit of the data stream. The number in parenthesis
indicates the default value of that bit.
The identification value for this device is stored in this register. This is a read-only register.
Register values. ASCII value H
Identification Register B
The identification register B is used to identify the device. IRB0 through IRB7 indicate bit locations, with IRB denoting the
bits that are in the identification register A. IRB7 denotes the first bit of the data stream.
Register values. ASCII value 4
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Location
SR7 to
SR3
SR2
SR1
SR0
IRA7
0
IRB7
0
IRA6
1
IRB6
0
Name
0
REN
LOCK
RDY
Table 19: Identification Register A Default Values
Table 20: Identification Register B Default Values
Table 18: Status Register Bit Designations
IRA5
0
IRB5
1
Description
These bits must be cleared for correct operation.
Regulator Enabled Bit. This bit is set when the internal
voltage regulator is enabled. This bit is cleared when the
internal regulator is disabled.
Data output register lock. This bit is set when this some but
not all for of the six data output registers have been read.
When this bit is set, the six data output registers are locked
and any new data will not be placed in these register until
on of four conditions are met: one, all six have been read
or the mode changed, two, a POR is issued, three, the
mode is changed, or four, the measurement is changed.
Ready Bit. Set when data is written to all six data registers.
Cleared when device initiates a write to the data output
registers, when in off mode, and after one or more of the
data output registers are written to. When RDY bit is clear
it shall remain cleared for a minimum of 5 μs. DRDY pin
can be used as an alternative to the status register for
monitoring the device for conversion data.
IRA4
0
IRB4
1
IRA3
1
IRB3
0
IRA2
0
IRB2
1
IRA1
0
IRB1
0
IRA0
0
IRB0
0
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