SI1141-A10-GMR Silicon Laboratories Inc, SI1141-A10-GMR Datasheet - Page 19

SENS IR PROXIMITY AMB LT 8-ODFN

SI1141-A10-GMR

Manufacturer Part Number
SI1141-A10-GMR
Description
SENS IR PROXIMITY AMB LT 8-ODFN
Manufacturer
Silicon Laboratories Inc
Datasheet

Specifications of SI1141-A10-GMR

Mfg Application Notes
Si1141 Touchless Lavatory AppNote Si114x Designer's Guide AppNote Si114x Overlay Considerations AppNote Si1141 Cheek Detection in Smartphones C8051F990/Si1141 Smoke Detection AppNote Si114x irLED Guide AppNote Si114x Control Panel Guide AppNote
Output Type
Digital - I²C
Sensor Type
Proximity, Infrared and Ambient Light
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
336-1968
SI1141-A10-GM

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4.2. Command Protocol
The I
writable I
Si1141/42/43-to-host communication.
Unlike the other host-writable I
from Standby mode to process the host request.
When a command is executed, the RESPONSE register is updated. Typically, when there is no error, the upper
four bits are zeroes. To allow command tracking, the lower four bits implement a 4-bit circular counter. In general, if
the upper nibble of the RESPONSE register is non-zero, this indicates an error or the need for special processing.
The PARAM_WR and PARAM_RD registers are additional mailbox registers.
In addition to the registers in the I
Response interface. These parameters are stored in the internal ram space. These parameters generally take
more I
PARAM_QUE
PARAM_AND 110 aaaaa
PARAM_SET
PARAM_OR
PS_FORCE
BUSADDR
Reserved
Reserved
RESET
COMMAND Register
Name
2
NOP
C map implements a bidirectional message box between the host and the Si1141/42/43 Sequencer. Host-
2
RY
C accesses to read and write. The Parameter RAM is described in "4.6. Parameter RAM" on page 48.
2
C registers facilitate host-to-Si1141/42/43 communication, while read-only I
100 aaaaa
101 aaaaa
000 00000
000 00001
000 00010
000 00100
000 00101
000 00011
111 aaaaa
Encoding
PARAM_W
R Register
2
dddd
dddd
dddd
dddd
dddd
dddd
C registers, the COMMAND register causes the internal sequencer to wake up
2
Table 5. Command Register Summary
C map, there are environmental parameters accessible through the Command/
PARAM_RD
nnnn nnnn
nnnn nnnn
nnnn nnnn
nnnn nnnn
Register
Rev. 1.1
RESPONSE Register
Error Code in
ü
ü
ü
ü
ü
ü
ü
Reads the parameter pointed to by
bitfield [4:0] and writes value to
PARAM_RD.
See Table 10 for parameters.
Sets parameter pointed by bitfield
[4:0] with value in PARAM_WR, and
writes value out to PARAM_RD. See
Table 10 for parameters.
Performs a bit-wise AND between
PARAM_WR and Parameter pointed
by bitfield [4:0], writes updated value
to PARAM_RD.
See Table 10 for parameters.
Performs a bit-wise OR of
PARAM_WR and parameter pointed
by bitfield [4:0], writes updated value
to PARAM_RD. See Table 10 for
parameters.
Forces a zero into the RESPONSE
register
Performs a software reset of the
firmware
Modifies I
Forces a single PS measurement
Si1141/42/43
2
C address
2
C registers are used for
Description
19

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