STM32F103ZGH6 STMicroelectronics, STM32F103ZGH6 Datasheet - Page 98
![MCU 32BIT 1MB FLASH 144LQFP](/photos/39/71/397107/lqfp-144_sml.jpg)
STM32F103ZGH6
Manufacturer Part Number
STM32F103ZGH6
Description
MCU 32BIT 1MB FLASH 144LQFP
Manufacturer
STMicroelectronics
Series
STM32r
Datasheet
1.STM32F103VGT6.pdf
(120 pages)
Specifications of STM32F103ZGH6
Core Processor
ARM® Cortex-M3™
Core Size
32-Bit
Speed
72MHz
Connectivity
CAN, I²C, IrDA, LIN, MMC, SPI, UART/USART, USB
Peripherals
DMA, I²S, LCD, POR, PWM, WDT
Number Of I /o
112
Program Memory Size
1MB (1M x 8)
Program Memory Type
FLASH
Ram Size
96K x 8
Voltage - Supply (vcc/vdd)
2 V ~ 3.6 V
Data Converters
A/D 21x12b; D/A 2x12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Processor Series
STM32F101xG
Core
ARM Cortex M3
Data Bus Width
32 bit
Data Ram Size
80 KB
Interface Type
I2C, SPI, UART
Maximum Clock Frequency
36 MHz
Number Of Programmable I/os
112
Number Of Timers
15
Operating Supply Voltage
2 V to 3.6 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Operating Temperature Range
- 40 C to + 105 C
Processor To Be Evaluated
STM32F103ZG
Supply Current (max)
28 mA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Details
Other names
497-11115
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
STM32F103ZGH6
Manufacturer:
STMicroelectronics
Quantity:
135
Company:
Part Number:
STM32F103ZGH6
Manufacturer:
STMicroelectronics
Quantity:
10 000
Part Number:
STM32F103ZGH6
Manufacturer:
ST
Quantity:
20 000
Electrical characteristics
98/120
Figure 50. I
1. Measurement points are done at CMOS levels: 0.3 × V
2. LSB transmit/receive of the previously transmitted byte. No LSB transmit/receive is sent before the first
Figure 51. I
1. Based on characterization, not tested in production.
2. LSB transmit/receive of the previously transmitted byte. No LSB transmit/receive is sent before the first
byte.
byte.
SD transmit
SD receive
SD transmit
SD receive
WS output
WS input
CPOL = 0
CPOL = 1
CPOL = 0
CPOL = 1
2
2
S slave timing diagram (Philips protocol)
S master timing diagram (Philips protocol)
t v(WS)
t su(WS)
t w(CKH)
t w(CKH)
LSB receive
Doc ID 16554 Rev 2
LSB transmit
LSB transmit
LSB receive
t su(SD_MR)
t su(SD_SR)
t c(CK)
t c(CK)
(2)
(2)
(2)
(2)
MSB receive
DD
MSB receive
MSB transmit
MSB transmit
and 0.7 × V
t w(CKL)
t w(CKL)
t f(CK)
(1)
DD
(1)
STM32F103xF, STM32F103xG
t h(SD_MR)
.
t v(SD_MT)
t v(SD_ST)
t h(SD_SR)
Bitn receive
Bitn transmit
Bitn transmit
Bitn receive
t r(CK)
LSB receive
t h(WS)
t h(WS)
t h(SD_ST)
LSB transmit
LSB receive
t h(SD_MT)
LSB transmit
ai14884b
ai14881b