6ES7 216 2BD23 0XB0 SIEMENS, 6ES7 216 2BD23 0XB0 Datasheet - Page 50

CPU, 226, AC/DC/RELAIS

6ES7 216 2BD23 0XB0

Manufacturer Part Number
6ES7 216 2BD23 0XB0
Description
CPU, 226, AC/DC/RELAIS
Manufacturer
SIEMENS
Datasheet

Specifications of 6ES7 216 2BD23 0XB0

No. Of Analogue Inputs
2
No. Of Digital Inputs
24
No. Of Digital Outputs
16
Ip/nema Rating
IP20
Approval Bodies
FM
External Depth
62mm
External Length / Height
80mm
For Use With
SIMATIC S7-200 Central
3
Central processing units
CPU 221, 222, 224, 224 XP, 226
Technical specifications (continued)
MPI
CPU/ programming
Programming language
• Instruction set
• User program protection/pass-
• Program execution
• Program organization
• Number of sub-programs, max.
Digital inputs
• Number of digital inputs
Length of cable
• m/p reading
Input voltage
Input current
Input delay (at rated value of the
input voltage)
• For standard inputs
• for alarm inputs
• for counters/technological
- Transmission rates, max.
- Transmission rates, min.
- LAD
- FBD
- STL
word protection
- Length of cable shielded, max
- Length of cable unshielded,
- Rated value, DC
- for signal "0"
- for signal "1"
- for 1 signal, typical
- Parameterizable
- at 0 after 1, min.
- at 0 after 1, max.
- parameterizable
functions
- parameterizable
3/8
max
SIMATIC S7-200
Siemens ST 70 · 2005
6ES7 211-0AA23-0XB0
187.5 kBit/s
19.2 kBit/s
Yes
Yes
Yes
Bit logic instructions,
compare instructions,
timer instructions,
counter instructions,
clock instructions,
integer math instructions,
floating-point math
instructions, numeric
functions, move instruc-
tions, table instructions,
logic instructions, shift
and rotate instructions,
conversion instructions,
program control instruc-
tions, interrupt and
communications instruc-
tions, logic stack
instructions
Yes; 3-stage password
protection
free cycle (OB 1),
interrupt-driven,
time-driven (1 to 255 ms)
1 OB, 1 DB, 1 SDB sub-
programs with/without
parameter transfer
64
6; integrated
500 m;
Standard input: 500m,
fast counters: 50m
300 m; not for
high-speed signals
Yes; optional, per group
24 V
0 to 5 V
min. 15 V
2.5 mA
Yes; all
0.2 ms
12.8 ms
Yes; I0.0 to I0.3
Yes;
(E0.0 to E0.5) 30 kHz
6ES7 211-0BA23-0XB0
187.5 kBit/s
19.2 kBit/s
Yes
Yes
Yes
Bit logic instructions,
compare instructions,
timer instructions,
counter instructions,
clock instructions,
integer math instructions,
floating-point math
instructions, numeric
functions, move instruc-
tions, table instructions,
logic instructions, shift
and rotate instructions,
conversion instructions,
program control instruc-
tions, interrupt and
communications instruc-
tions, logic stack
instructions
Yes; 3-stage password
protection
free cycle (OB 1),
interrupt-driven,
time-driven (1 to 255 ms)
1 OB, 1 DB, 1 SDB sub-
programs with/without
parameter transfer
64
6; integrated
500 m;
Standard input: 500m,
fast counters: 50m
300 m; not for
high-speed signals
Yes; optional, per group
24 V
0 to 5 V
min. 15 V
2.5 mA
Yes; all
0.2 ms
12.8 ms
Yes; I0.0 to I0.3
Yes;
(E0.0 to E0.5) 30 kHz
6ES7 212-1AB23-0XB0
187.5 kBit/s
19.2 kBit/s
Yes
Yes
Yes
Bit logic instructions,
compare instructions,
timer instructions,
counter instructions,
clock instructions,
integer math instructions,
floating-point math
instructions, numeric
functions, move instruc-
tions, table instructions,
logic instructions, shift
and rotate instructions,
conversion instructions,
program control instruc-
tions, interrupt and
communications instruc-
tions, logic stack
instructions
Yes; 3-stage password
protection
free cycle (OB 1),
interrupt-driven,
time-driven (1 to 255 ms)
1 OB, 1 DB, 1 SDB sub-
programs with/without
parameter transfer
64
8
500 m;
Standard input: 500m,
fast counters: 50m
300 m; not for
high-speed signals
Yes; optional, per group
24 V
0 to 5 V
min. 15 V
2.5 mA
Yes; all
0.2 ms
12.8 ms
Yes; I0.0 to I0.3
Yes;
(E0.0 to E0.5) 30 kHz
6ES7 212-1BB23-0XB0
187.5 kBit/s
19.2 kBit/s
Yes
Yes
Yes
Bit logic instructions,
compare instructions,
timer instructions,
counter instructions,
clock instructions,
integer math instructions,
floating-point math
instructions, numeric
functions, move instruc-
tions, table instructions,
logic instructions, shift
and rotate instructions,
conversion instructions,
program control instruc-
tions, interrupt and
communications instruc-
tions, logic stack
instructions
Yes; 3-stage password
protection
free cycle (OB 1),
interrupt-driven,
time-driven (1 to 255 ms)
1 OB, 1 DB, 1 SDB sub-
programs with/without
parameter transfer
64
8
500 m;
Standard input: 500m,
fast counters: 50m
300 m; not for
high-speed signals
Yes; optional, per group
24 V
0 to 5 V
min. 15 V
2.5 mA
Yes; all
0.2 ms
12.8 ms
Yes; I0.0 to I0.3
Yes;
(E0.0 to E0.5) 30 kHz

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