5962-9755701HXA Avago Technologies US Inc., 5962-9755701HXA Datasheet
5962-9755701HXA
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5962-9755701HXA Summary of contents
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... Hermetically Sealed Analog Isolation Amplifier Data Sheet HCPL-7850, HCPL-7851, 5962-97557 Description The HCPL-7850/7851 is an isolation amplifier that provides accurate, electrically isolated and amplified representations of voltage and current. When used with a shunt resistor to monitor the motor phase current in a high speed motor ...
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... Gain tolerance of 5% with 0.1% nonlinearity further pro- vide the performance necessary for accurate feedback and control. HCPL-7850 HCPL-7851 Gold Plate Option #200 Option #100 Option #300 5962- 9755701HPX 9755701HPC 9755701HPA 9755701HYC 9755701HYA 9755701HXA COMPLIANCE INDICATOR,* DATE CODE, SUFFIX (IF NEEDED) COUNTRY OF MFR. ...
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Outline Drawing ;; ; ; ;; ; ; 9.40 (0.370) 9.91 (0.390) 0.76 (0.030) 1.27 (0.050) 0.51 (0.020) MIN. 2.29 (0.090) 0.51 (0.020) 2.79 (0.110) NOTE: DIMENSIONS IN MILLIMETERS (INCHES Hermetic Optocoupler Options Option Description ...
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Absolute Maximum Ratings Parameter Storage Temperature Operating Temperature Supply Voltages Steady-State Input Voltage 2 Second Transient Input Voltage Output Voltages Lead Solder Temperature ESD Classification (MIL-STD-883, Method 3015) HCPL-7850/7851 Recommended Operating Conditions Parameter Symbol Supply Voltages V V Input Voltage ...
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DC Electrical Specifications Over recommended operating conditions (T unless otherwise specified). Group A Parameter Symbol Subgroups Input Offset V 1,2,3 OS Voltage Gain G 2,3 1 200 mV NL 2,3 200 Nonlinearity 1 100 mV NL 2,3 100 Nonlinearity 1 ...
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AC Electrical Specifications Over recommended operating conditions ( unless otherwise specified). DD2 Group A Parameter Symbol Subgroups Common Mode CMR 9 Rejection Propagation t 9,10,11 PD50 Delay to 50% Propagation t 9,10,11 PD90 Delay to 90% ...
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V DD1 1 2 HCPL-7850 0.1 µ Figure 1. Input Offset Voltage Test Circuit. 2 DD1 DD2 1.5 1.0 0.5 0 -0.5 -60 - 100 140 T – ...
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V DD1 1 0.1 µF 404 HCPL-7850 13.2 3 0.01 µF 4 Figure 5. Gain and Nonlinearity Test Circuit. 0. DD1 DD2 0 -0.05 -0.10 -0.15 -0.20 -60 -20 ...
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DD1 200 DD2 100 IN– °C 0.3 A 0.2 0.1 0 -60 - 100 140 T – TEMPERATURE – °C ...
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DD1 DD2 IN– 9.5 9 25°C A 8.5 8.0 -0.4 -0.2 0 0.2 0.4 V – INPUT VOLTAGE – V IN+ Figure 15. Output Supply ...
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DELAY TO 90% 9 DELAY TO 50% RISE/FALL TIME DD1 DD2 IN– 100 mV STEP IN+ 2 ...
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VOLTAGE CLOCK REGULATOR GENERATOR ISO-AMP ENCODER MODULATOR INPUT Figure 23. HCPL-7850 Block Diagram. POSITIVE FLOATING SUPPLY HV+ GATE DRIVE CIRCUIT U1 78L05 IN C1 0.1 µF MOTOR + – • • • R SENSE • • • HV– Figure 24. ...
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Applications Information Functional Description Figure 23 shows the primary functional blocks of the HCPL- 7850. In operation, the sigma-delta modulator converts the analog input signal into a high-speed serial bit stream. The time average of this bit stream is directly ...
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As shown in Figure 24, a 0.1 F bypass capacitor (C2, C4) should be located as close as possible to the input and output power supply pins of the HCPL-7850. The bypass capacitors are required because of the high-speed digital ...
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PCB does not pass directly below the HCPL-7850. Using surface mount components can help achieve many of the PCB objectives discussed in the preceding paragraphs. An example through-hole PCB layout illustrating some ...
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... MIL-PRF-38534 Class H and DSCC SMD Test Program Avago Technologies’ Hi-Rel Optocouplers are in compliance with MIL-PRF-38534 Class H. Class H devices are also in compliance with DSCC drawing 5962-97557. Testing consists of 100% screening and quality conformance inspection to MIL-PRF-38534. For product information and a complete list of distributors, please go to our website: Avago, Avago Technologies, and the A logo are trademarks of Avago Technologies Limited in the United States and other countries. Data subject to change. Copyright © ...