HCPL-7510-560E Avago Technologies US Inc., HCPL-7510-560E Datasheet - Page 13

• Manufacturer Part Number: HCPL-7510-560E
• Description: Optocoupler
• Manufacturer: Avago Technologies US Inc.

Specifications of HCPL-7510-560E

• No. Of Channels: 1
• Isolation Voltage: 3.75kV
• Optocoupler Output Type: Analog
• Input Current: 16mA
• Output Voltage: 6V
• Opto Case Style: SMD
• No. Of Pins: 8
• Peak Reflow Compatible (260 C): Yes
• Reel Quantity: 1000
• Amplifier Type: Isolation
• Number Of Circuits: 1
• -3db Bandwidth: 100kHz
• Current - Input Bias: 600nA
• Voltage - Input Offset: 600µV
• Current - Supply: 11.7mA
• Current - Output / Channel: 16mA
• Voltage - Supply, Single/dual (±): 4.5 V ~ 5.5 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 8-SMD Gull Wing
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Output Type: -
• Slew Rate: -
• Gain Bandwidth Product: -
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant

Figure 17. Recommended HCPL-7510 application circuit.
13
As shown in Figure 17, 0.1 µF bypass capacitors (C1, C2)
should be located as close as possible to the pins of the
HCPL-7510. The bypass capacitors are required because
of the high-speed digital nature of the signals inside the
HCPL-7510. A 0.01 µF bypass capacitor (C2) is also rec-
ommended at the input due to the switched-capacitor
nature of the input circuit. The input bypass capacitor
also forms part of the anti-aliasing filter, which is recom-
mended to prevent high frequency noise from aliasing
down to lower frequencies and interfering with the input
signal. The input filter also performs an important reliabil-
ity function—it reduces transient spikes from ESD events
flowing through the current sensing resistor.
MOTOR
R SENSE
+
R1
HV+
HV
0.1 µF
C1
GATE DRIVE
IN OUT
FLOATING
POSITIVE
78L05
SUPPLY
CIRCUIT
U1
68 W
R5
0.1 µF
C2
0.01 µF
C3
PC Board Layout
The design of the printed circuit board (PCB) should
follow good layout practices, such as keeping bypass
capacitors close to the supply pins, keeping output
signals away from input signals, the use of ground and
power planes, etc. In addition, the layout of the PCB can
also affect the isolation transient immunity (CMTI) of the
HCPL-7510, due primarily to stray capacitive coupling
between the input and the output circuits. To obtain
optimal CMTI performance, the layout of the PC board
should minimize any stray coupling by maintaining the
maximum possible distance between the input and
output sides of the circuit and ensuring that any ground
or power plane on the PC board does not pass directly
below or extend much wider than the body of the HCPL-
7510.
1
2
3
4
V
V
V
GND1
DD1
IN+
IN
HCPL-7510
GND2
V
V
V
DD2
OUT
REF
8
7
6
5
+5 V
C4
C6 = 150 pF
C4 = C5 = 0.1 µF
C5
C6
A/D
V
GND
REF
µC